M16C6K7 Datasheet, PDF (248/285 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Rev.1.0
Electrical characteristics
Mitsubishi microcomputers
M16C / 6K7 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timing requirements (referenced to Vcc = 3.0 to 3.6V, Vss = 0V, Ta =25 °C)
Table. ZA-20 Multi-master I²C-BUS line
Symbol
Parameter
tBUF
tHD;STA
tLOW
tR
tHD;DAT
tHIGH
tF
tsu;DAT
tsu;STA
tsu;STO
Bus free time
The hold time in start condition
The hold time in SCL clock "0" status
SCL, SDA signals' rising time
Data hold time
The hold time in SCL clock "1" status
SCL, SDA signals' falling time
Data setup time
The setup time in restart condition
Stop condition setup time
Standard clock mode
Min.
Max.
High-speed clock mode
Unit
Min.
Max.
4.7
1.3
µs
4.0
0.6
µs
4.7
1.3
µs
1000
20+0.1Cb
300
ns
0
0
0.9
µs
4.0
0.6
µs
300
20+0.1Cb
300
ns
250
100
ns
4.7
0.6
µs
4.0
0.6
µs
Table. ZA-21 PS2 interface (referenced to Vcc = 3.0 to 3.6V, Vss = 0V, Ta =25 °C)
Symbol
twL
twH
tsu
PS2 clock "L" pulse width
PS2 clock "H" pulse width
PS2 data setup time
Parameter
Standard
Unit
Min.
Typ.
Max.
30
50
µs
30
50
µs
5
µs
th
PS2 data hold time
0
ns
td
PS2 data delay time
tv
PS2 data valid time
twL-5
µs
0
twL-5
µs
Table. ZA-22 LPC bus interface/serial interrupt output
Symbol
tC(CLK)
tWH(CLK)
tWL(CLK)
tsu(D-C)
th(C-D)
tV(C-D)
toff(A-F)
Parameter
LCLK clock input cycle time
LCLK clock input "H" pulse width
LCLK clock input "L" pulse width
Input setup time
LAD3-LAD0
_______________
LFRAME
_______________
SERIRQ,CLKRUN
_______________ _______________
LAD3-LAD0,SERIRQ,CLKRUN , LFRAME
input hold time
_______________
LAD3-LAD0,SERIRQ,CLKRUN
output delay time
_______________
LAD3-LAD0,SERIRQ,CLKRUN
floating output delay time
Standard
Unit
Min.
Typ.
Max.
30
∞
ns
11
ns
11
ns
9
ns
7
ns
0
ns
2
11
ns
28
ns
247