M16C6K7 Datasheet, PDF (55/285 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Rev.1.0
Interrupt
Mitsubishi microcomputers
M16C / 6K7 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
_______ ________
Reset > NMI > DBC > Watchdog timer > Peripheral I/O > Single step > Address match
Fig.DD-9 Hardware interrupts priorities
Priority level of each interrupt
INT1/PS21
Level 0 (initial value)
Timer B2/Key input interrupt 1
Timer B0/INT11/SCL0,SDA0
Timer A3/IBF2
Timer A1/INT7
Timer B4
INT3
INT2/PS22
INT0/PS20
Timer B1/INT10/SCL1,SDA1
Timer A4/IBF3
Timer A2
Timer B3
Timer B5/INT9
UART1 reception/SCL1,SDA1/INT10
UART0 reception/SCL0,SDA0/INT11
UART2 reception/IBF1
A-D conversion
DMA1/INT7
Bus collision detection/INT4
Serial I/O4/INT6
Timer A0/INT8
UART1 transmission/I2C1
UART0 transmission/I2C0
UART2 transmission/IBF0
Key input interrupt 0
DMA0/INT8
Serial I/O3/INT5
Processor interrupt priority level (IPL)
Interrupt enable flag (I flag)
Address match
Watchdog timer
DBC
NMI
Reset
High
Priority of peripheral I/O interrupts
(if priority levels are same)
Low
To interrupt request level judgment output
clock generation circuit (Fig. WA-3)
Interrupt
request
accepted
Fig.DD-10 Interrupt priority judgement circuit
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