M16C6K7 Datasheet, PDF (168/285 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Rev.1.0
Serial Interrupt Output
Mitsubishi microcomputers
M16C / 6K7 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
q Serial interrupt control register0 SERCON0
The operation condition of serial interrupt is set.
•OBFi sync enable bit SENi (i=00,01,1-3)
By setting the bit to “1”, the rising edge of OBFi output to host bus interface generates the serial
interrupt request synchronously.
•Clock stop inhibition bit SUPEN
Setting the bit to “1” will request the inhibition of clock if the clock tends to stop or slow down in
serial interrupt request.
•Clock restart enable bit RUNEN
Setting the bit to “1” requests the clock restart during the clock stop or clock slow down in serial
interrupt request.
•Serial interrupt enable bit IRQEN
__________ _______________
0: SERIRQ, PRST, CLKRUN are I/O ports.
__________ _______________
1: SERIRQ, PRST, CLKRUN are serial interrupt function ports.
Serial interrupt control register0
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
SERCON0
Address When reset
02B016 0016
Bit symbol
Bit name
SEN00 OBF00 sync enable bit
SEN01 OBF01 sync enable bit
SEN1 OBF1 sync enable bit
SEN2 OBF2 sync enable bit
SEN3 OBF3 sync enable bit
SUPEN Clock stop inhibition bit
RUNEN Clock restart enable bit
IRQEN Serial interrupt enable bit
(Note 1)
Function
0: Sync inhibition
1: Sync enable
RW
0: Sync inhibition
1: Sync enable
0: Sync inhibition
1: Sync enable
0: Sync inhibition
1: Sync enable
0: Sync inhibition
1: Sync enable
0: Stop control operation
1: No stop control operation
0: No clock restart
1: Clock restart
0: Serial interrupt inhibition
1: Serial interrupt enable
__________
_______________
Note 1 : By setting this bit to “1”, P43, P45 and P46 are selected as SERIRQI/O, PRST input and CLKRUN I/O ports respectively.
_______________
The output of CLKRUN pin is N channel open drain type.
_________
P45/PRST functions as GPIO port even when the bit is "1" if bit 1 of serial interrupt control register 1 (Address 02B116) is "1".
Fig.SI-4 Configuration of serial interrupt control register0
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