PD77210_15 Datasheet, PDF (66/76 Pages) Renesas Technology Corp – 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSOR

µPD77210, 77213
Caution If noise is superimposed on the serial clock, the serial interface may be deadlocked. Bear in
mind the following points when designing your system:
• Reinforce the wiring for power supply and ground (if noise is superimposed on the power and
ground lines, it has the same effect as if noise were superimposed on the serial clock).
• Shorten the wiring between the device's ASCK, TSCK, BCLK pins, and clock supply source.
• Do not cross the signal lines of the serial clock with any other signal lines. Do not route the
serial clock line in the vicinity of a line through which a high alternating current flows.
• Supply the clock to the ASCK, TSCK, BCLK pins of the device from the clock source on a one-
to-one basis. Do not supply clock to several devices from one clock source.
• Exercise care that the serial clock does not overshoot or undershoot. In particular, make sure
that the rising and falling of the serial clock waveform are clear.
Make sure that the serial clock
rises and falls linearly.
×
×
The serial clock must not bound. Noise
The serial clock must not rise or
must not be superimposed on the serial clock. fall step-wise.
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Data Sheet U15203EJ3V0DS