PD77210_15 Datasheet, PDF (47/76 Pages) Renesas Technology Corp – 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSOR

Instruction Name
Mnemonic
µPD77210, 77213
Operation
Instructions That Can Be
Described Simultaneously
Jump
Register-to-register
jump
Subroutine call
Register-to-register
subroutine call
Return
Interrupt return
Repeat
Loop
Loop pop
No operation
Halt
Stop
Condition
Forget interrupt
JMP imm
JMP dp
PC ← imm
PC ← dp
CALL imm
SP ← SP + 1
STK ← PC + 1
PC ← imm
CALL dp
SP ← SP + 1
STK ← PC + 1
PC ← dp
RET
PC ← STK
SP ← SP − 1
RETI
PC ← STK
STK ← SP − 1
Restores interrupt enable flag.
REP count
Start
RC ← count
RF ← 0
During repeat PC ← PC
RC ← RC − 1
End
PC ← PC + 1
RF ← 1
LOOP count
Start
LC ← count
(Instruction of 2 lines or more)
LF ← 0
During loop PC ←
PC + 1 (while PC < LEA)
if (PC = LEA) PC ← LSA
LC ← LC − 1
End
PC ← PC + 1
LF ← 1
LPOP
LC ← LSR3
LE ← LSR2
LS ← LSR1
LSP ← LSP − 1
NOP
PC ← PC + 1
HALT
CPU stops.
STOP
CPU stops, PLL, and OSC
can be stopped by a user
IF (ro cond)
Condition judgment
FINT
Discards interrupt request.
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√
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√
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Data Sheet U15203EJ3V0DS
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