PD77210_15 Datasheet, PDF (53/76 Pages) Renesas Technology Corp – 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSOR

µPD77210, 77213
Reset, Interrupt, System Control, Timer
Timing requirements
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
RESET low level width
CSTOP high level width
CSTOP recovery time
INTmn low level width
INTmn recovery time
tw(RL)
tw(CSTOPH)
trec(CSTOP)
tw (INTL)
trec (INT)
6 t Note 1
cCX
ns
12
t ^{Note 2}
cC
ns
12
t ^{Note 2}
cC
ns
6 t Note 3
cC
ns
6 t Note 3
cC
ns
Notes 1. When reset timing, it is specified by input clock.
2. When STOP or HALT mode, it is specified by divided clock.
3. Interrupt can input by TSIEN, TSOEN, ASIEN, and ASOEN pins other than interrupt pins. The interrupt
pins function alternately as pins P0 to P15.
Remark INTmn m, n = 0 to 3
Switching characteristics
Parameter
STOPS output delay time
HALTS output delay time
TIMOUT output delay time
TIMOUT output width
Symbol
tdSTP
tdHLT
tdTIM
twTIM
Condition
MIN.
TYP.
MAX.
Unit
0
6.25
ns
0
6.25
ns
0
6.25
ns
4 tcC
ns
Reset timing
RESET
tw(RL)
WAKEUP timing
CSTOP
tw(CSTOPH)
trec(CSTOP)
Interrupt timing
INTmn
tw(INTL)
Data Sheet U15203EJ3V0DS
trec(INT)
51