PD77210_15 Datasheet, PDF(19/76 Page) Renesas Technology Corp – 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSOR

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PD77210_15 Datasheet, PDF (19/76 Pages) Renesas Technology Corp – 16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSOR

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ÂµPD77210, 77213

â¢ Timer

Pin Name

TIMOUT

Pin No.

144-pin LQFP 161-pin FBGA

I/O

Function

Output Time out monitor

This pin is asserted active when the timer times out.

Alternate

â¢ Serial interface

Pin Name

Pin No.

I/O

144-pin LQFP 161-pin FBGA

Function

Alternate

ASCK/

I/O Audio serial clock input/output

BCLK

ASCK:Audio serial clock input

BCLK:Serial clock I/O

ASO

Output Audio serial data output

(3S)

ASI

Input Audio serial data input

ASOEN/ 69

LRCLK

ASIEN/

MCLK

TSCK

I/O Audio serial output enable/left right clock input output

ASOEN:Audio serial output enable input

LRCLK:Left right clock I/O

Input Audio serial input enable/master clock input output

ASIEN:Audio serial input enable input

MCLK:Master clock input (in master mode)

Input Clock input for time division serial

TSO

Output Time-division serial data output

(3S)

TSI

Input Time-division serial data input

TSORQ

Output Time-division serial output request

TSOEN

Input Time-division serial output enable

TSIEN

Input Time-division serial input enable

TSIAK

Output Time-division serial input acknowledge

Remark Those pins marked â3Sâ in the above table enter the high-impedance state when data transmission is

completed and when the hardware reset (RESET) signal is input.

Data Sheet U15203EJ3V0DS

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