R5F61655N50FPV Datasheet, PDF (656/1376 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 14 16-Bit Timer Pulse Unit (TPU)
Table 14.38 TIORH_6 (Unit 1)
Description
Bit 3 Bit 2 Bit 1 Bit 0 TGRA_6
IOA3 IOA2 IOA1 IOA0 Function TIOCA6 Pin Function
0
0
0
0
Output Output disabled
0
0
0
1
compare _{Initial output is 0 output}
register
0 output at compare match
0
0
1
0
Initial output is 0 output
1 output at compare match
0
0
1
1
Initial output is 0 output
Toggle output at compare match
0
1
0
0
Output disabled
0
1
0
1
Initial output is 1 output
0 output at compare match
0
1
1
0
Initial output is 1 output
1 output at compare match
0
1
1
1
Initial output is 1 output
Toggle output at compare match
1
0
0
1
Input
Capture input source is TIOCA6 pin
capture _{Input capture at falling edge}
register
1
0
0
0
Capture input source is TIOCA6 pin
Input capture at rising edge
1
0
1
X
Capture input source is TIOCA6 pin
Input capture at both edges
1
1
X
X
Capture input source is channel 7/count clock
Input capture at TCNT_7 count-up/count-down*
[Legend]
X:
Don't care
Note: * When the bits TPSC2 to TPSC0 in TCR_7 are set to B'000 and Pφ/1 is used as the
count clock of TCNT_7, this setting is invalid and input capture is not generated.
Rev. 2.00 Oct. 20, 2009 Page 624 of 1340
REJ09B0499-0200