R5F61655N50FPV Datasheet, PDF (1117/1376 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 24 Flash Memory
24.9 Protection
There are three types of protection against the flash memory programming/erasure: hardware
protection, software protection, and error protection.
24.9.1 Hardware Protection
Programming and erasure of the flash memory is forcibly disabled or suspended by hardware
protection. In this state, download of an on-chip program and initialization are possible. However,
programming or erasure of the user MAT cannot be performed even if the programming/erasing
program is initiated, and the error in programming/erasure is indicated by the FPFR parameter.
Table 24.13 Hardware Protection
Item
Reset protection
Function to be Protected
Description
Download
Programming/
Erasing
• The programming/erasing interface O
O
registers are initialized in the reset
state (including a reset by the WDT)
and the programming/erasing
protection state is entered.
• The reset state will not be entered by
a reset using the RES pin unless the
RES pin is held low until oscillation has
settled after a power is initially
supplied. In the case of a reset during
operation, hold the RES pin low for the
RES pulse width given in the AC
characteristics. If a reset is input during
programming or erasure, data in the
flash memory is not guaranteed. In this
case, execute erasure and then
execute programming again.
Rev. 2.00 Oct. 20, 2009 Page 1085 of 1340
REJ09B0499-0200