R5F61655N50FPV Datasheet, PDF (1098/1376 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 24 Flash Memory
(1) On-Chip RAM Address Map when Programming/Erasure is Executed
Parts of the procedure program that is made by the user, like download request,
programming/erasure procedure, and decision of the result, must be executed in the on-chip RAM.
Since the on-chip program to be downloaded is embedded in the on-chip RAM, make sure the on-
chip program and procedure program do not overlap. Figure 24.12 shows the area of the on-chip
program to be downloaded.
Area to be
downloaded
(size: 4 kbytes)
Unusable area during
programming/erasing
DPFR
(Return value: 1 byte)
System use area
(15 bytes)
Programming/erasing
program entry
Initialization program
entry
Initialization +
programming program
or
Initialization +
erasing program
RAM emulation area or
area that can be used
by user
FTDAR setting
FTDAR setting + 16 bytes
FTDAR setting + 32 bytes
FTDAR setting + 4 kbytes
Area that can be used
by user
H'FFBFFF
Figure 24.12 RAM Map when Programming/Erasure is Executed
Rev. 2.00 Oct. 20, 2009 Page 1066 of 1340
REJ09B0499-0200