RX630_15 Datasheet, PDF (60/156 Pages) Renesas Technology Corp – Renesas MCUs

RX630 Group
4.1 I/O Register Addresses (Address Order)
4. I/O Registers
Table 4.1
Address
0008 0000h
0008 0002h
0008 0006h
0008 0008h
0008 000Ch
0008 0010h
0008 0014h
0008 0018h
0008 0020h
0008 0024h
0008 0026h
0008 0028h
0008 002Ah
0008 0030h
0008 0032h
0008 0033h
0008 0034h
0008 0035h
0008 0036h
0008 0040h
0008 0041h
0008 00A0h
0008 00A1h
0008 00A2h
0008 00A3h
0008 00A6h
0008 00C0h
0008 00C2h
0008 00E0h
0008 00E1h
0008 00E2h
0008 00E3h
0008 03FEh
0008 1300h
0008 1304h
0008 1308h
0008 130Ah
0008 1310h
0008 2000h
0008 2004h
0008 2008h
0008 200Ch
0008 2010h
0008 2013h
List of I/O Registers (Address Order) (1/42)
Module
Symbol Register Name
SYSTEM Mode monitor register
SYSTEM Mode status register
SYSTEM System control register 0
SYSTEM System control register 1
SYSTEM Standby control register
SYSTEM Module stop control register A
SYSTEM Module stop control register B
SYSTEM Module stop control register C
SYSTEM System clock control register
SYSTEM System clock control register 2
SYSTEM System clock control register 3
SYSTEM PLL control register
SYSTEM PLL control register 2
SYSTEM External bus clock control register
SYSTEM Main clock oscillator control register
SYSTEM Sub-clock oscillator control register
SYSTEM Low-speed on-chip oscillator control register
SYSTEM IWDT-dedicated on-chip oscillator control
register
SYSTEM High-speed on-chip oscillator control register
SYSTEM Oscillation stop detection control register
SYSTEM Oscillation stop detection status register
SYSTEM Operating power control register
SYSTEM Sleep mode return clock source switching
register
SYSTEM Main clock oscillator wait control register
SYSTEM Sub-clock oscillator wait control register
SYSTEM PLL wait control register
SYSTEM Reset status register 2
SYSTEM Software reset register
SYSTEM Voltage monitoring 1 circuit control register 1
SYSTEM Voltage monitoring 1 circuit status register
SYSTEM Voltage monitoring 2 circuit control register 1
SYSTEM Voltage monitoring 2 circuit status register
SYSTEM Protect register
BSC
BSC
BSC
BSC
BSC
DMAC0
DMAC0
DMAC0
DMAC0
DMAC0
DMAC0
Bus error status clear register
Bus error monitoring enable register
Bus error status register 1
Bus error status register 2
Bus priority control register
DMA source address register
DMA destination address register
DMA transfer count register
DMA block transfer count register
DMA transfer mode register
DMA interrupt setting register
Register
Symbol
MDMONR
MDSR
SYSCR0
SYSCR1
SBYCR
MSTPCRA
MSTPCRB
MSTPCRC
SCKCR
SCKCR2
SCKCR3
PLLCR
PLLCR2
BCKCR
MOSCCR
SOSCCR
LOCOCR
ILOCOCR
Number of Access States
Number Access
Related
of Bits Size
ICLK PCLK ICLK  PCLK Function
16
16
16
16
3 ICLK
3 ICLK
Operating
Modes
16
16
3 ICLK
16
16
3 ICLK
16
16
32
32
3 ICLK
3 ICLK
Low Power
Consumption
32
32
3 ICLK
32
32
3 ICLK
32
32
16
16
16
16
3 ICLK
3 ICLK
3 ICLK
Clock
Generation
Circuit
16
16
3 ICLK
8
8
3 ICLK
8
8
3 ICLK
8
8
3 ICLK
8
8
3 ICLK
8
8
3 ICLK
8
8
3 ICLK
HOCOCR
OSTDCR
OSTDSR
OPCCR
RSTCKCR
8
8
8
8
8
8
8
8
8
8
3 ICLK
3 ICLK
3 ICLK
3 ICLK
3 ICLK
Low Power
Consumption
MOSCWTCR
8
8
SOSCWTCR
8
8
PLLWTCR
8
8
RSTSR2
8
8
SWRR
16
16
LVD1CR1
8
8
LVD1SR
8
8
LVD2CR1
8
8
LVD2SR
8
8
PRCR
16
16
BERCLR
BEREN
BERSR1
BERSR2
BUSPRI
DMSAR
DMDAR
DMCRA
DMCRB
DMTMD
DMINT
8
8
8
8
8
8
16
16
16
16
32
32
32
32
32
32
16
16
16
16
8
8
3 ICLK
3 ICLK
3 ICLK
3 ICLK
3 ICLK
3 ICLK
3 ICLK
3 ICLK
3 ICLK
3 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
2 ICLK
Resets
LVDA
Register Write
Protection
Function
Buses
DMACA
R01DS0060EJ0160 Rev.1.60
May 19, 2014
Page 60 of 154