RX630_15 Datasheet, PDF (57/156 Pages) Renesas Technology Corp – Renesas MCUs

RX630 Group
3. Address Space
3.2 External Address Space
The external address space is divided into up to eight CS areas (CS0 to CS7), each corresponding to the CSn# signal
output from a CSn# (n = 0 to 7) pin.
Figure 3.2 shows the address ranges corresponding to the individual CS areas (CS0 to CS7) in on-chip ROM disabled
extended mode.
0000 0000h
0002 0000h
0008 0000h
0010 0000h
RAM
Reserved area*¹
Peripheral I/O registers
Reserved area*¹
0100 0000h
External address space
(CS area)
0800 0000h
Reserved area*¹
0100 0000h
01FF FFFFh
0200 0000h
02FF FFFFh
0300 0000h
03FF FFFFh
0400 0000h
04FF FFFFh
0500 0000h
05FF FFFFh
0600 0000h
06FF FFFFh
0700 0000h
07FF FFFFh
CS7 (16 Mbytes)
CS6 (16 Mbytes)
CS5 (16 Mbytes)
CS4 (16 Mbytes)
CS3 (16 Mbytes)
CS2 (16 Mbytes)
CS1 (16 Mbytes)
FF00 0000h
External address space*²
FFFF FFFFh
FF00 0000h
FFFF FFFFh
CS0 (16 Mbytes)
Figure 3.2
Note 1.
Note 2.
Reserved areas should not be accessed.
The CS0 area is disabled in on-chip ROM enabled extended mode.
In this mode, the address space for addresses above 0800 0000h is as shown in figure on
this section, Memory Map in Each Operating Mode.
Correspondence between External Address Spaces and CS Areas
(In On-Chip ROM Disabled Extended Mode)
R01DS0060EJ0160 Rev.1.60
May 19, 2014
Page 57 of 154