HD66773R Datasheet, PDF (60/133 Pages) Renesas Technology Corp – 262,144-color, 132 x 176-dot Graphics Controller Driver for TFT LCD panels

HD66773R
Data transmission synchronization in 9-bit bus interface mode
The HD66773R supports the data transmission synchronizing function, which resets the upper/lower
counter that counts the number of transmission of upper/lower 9-bit data in the 9-bit bus interface mode.
When a discrepancy occurs in the transmission of upper/lower 9-bit data due to effects from noise and so
on, the “00” H instruction is written 4 times consecutively to forcibly reset the upper/lower counter so that
data transmission restarts with an upper 9-bit transmission. Periodical execution of the synchronization
allows the system recovery from the excursion.
RS
RD
WR
DB17
to DB9
Upper or
Lower
"00"H
(1)
"00"H
(2)
"00"H
(3)
"00"H
(4)
Upper
Lower
9-bit transfer synchronization
Rev.1.10, Jun.21.2003, page 60 of 133