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HD66773R Datasheet, PDF (50/133 Pages) Renesas Technology Corp – 262,144-color, 132 x 176-dot Graphics Controller Driver for TFT LCD panels
HD66773R
Read Data from GRAM (R22h)
R/W RS
R1
RAM Read data (RD17-0) The pin assignment for DB17-0 varies for each interface (see below).
RD15–0: Read 16-bit data from GRAM. The bit assignment for the data to be read out from GRAM is
different according to the interface.
When data are read out from GRAM to the microcomputer, the first word read immediately after GRAM
address set are latched in the internal read-data latch, and the data in the data bus (DB17–0) are nullified.
The second word is read as a valid data. When the HD66773R performs an internal bit processing, such as
logical operation, it uses the data latched in the read-data latch, and completes it by single read out
operation. The data are expanded internally into 18 bits before going through the logical operation.
GRAM data read and logical operation are available with 8-/16-bit interface mode. If 9-/18-bit interface
modes are selected, this function is not available.
16-bit interface
GRAM data R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B4 B3 B2 B1 B0
Read data
RD RD RD RD RD RD RD RD RD RD RD RD RD RD RD RD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Output pin
DB
17
DB
16
DB DB
15 14
DB
13
DB DB DB
12 11 10
DB DB DB DB
8765
DB DB DB
432
DB
1
8-bit interface / Interface SPI
GRAM Data R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B4 B3 B2 B1 B0
1 pixel
Read data
RD RD RD RD RD RD RD RD RD RD RD RD RD RD RD RD
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Output pins
DB
17
DB
16
DB DB
15 14
DB
13
DB DB DB
12 11 10
First transfer (Upper)
DB DB DB DB DB DB DB DB
17 16 15 14 13 12 11 10
Second transfer (lower)
Rev.1.10, Jun.21.2003, page 50 of 133