HD66773R Datasheet, PDF (128/133 Pages) Renesas Technology Corp – 262,144-color, 132 x 176-dot Graphics Controller Driver for TFT LCD panels

HD66773R
Timing characteristics diagram
68-system bus interface operation
RS
R/W
CS*
E
Note 2)
DB0
to DB17
Note 2)
DB0
to DB17
VIH
VIL
tASE
VIH
VIL
tAHE
VIL
VIL
Note 1)
PWEH
PWEL
VIH
VIH
VIL
VIL
VIL
t Er
tEf
tCYCE
tDSWE
tHE
VIH _{Wrire data}
VIL
tDDRE
VIH
VIL
tDHRE
VOH1 _{Read data}
VOL1
VOH1
VOL1
Note 1) PWEH is determined by the overlapping period when CS* is "Low" and E is "High".
Note 2) Parallel data transfer with DB17-0 pins through 18-bit bus interface.
Parallel data transfer with DB17-10, DB8-1 pins through 16-bit bus interface.
Fix unused DB9,0 pins to "GND".
Parallel data transfer with DB17-9 pins through 9-bit bus interface.
Fix unused DB8-0 pins to "GND".
Parallel data transfer with DB17-10 pins through 8-bit bus interface.
Fix unused DB9-0 pins to "GND".
Figure 1
Rev.1.10, Jun.21.2003, page 128 of 133