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HD66773R Datasheet, PDF (16/133 Pages) Renesas Technology Corp – 262,144-color, 132 x 176-dot Graphics Controller Driver for TFT LCD panels
HD66773R
3. Address Counter (AC)
The address counter (AC) assigns addresses to GRAM. When an address set instruction is written into the
IR, the address information is sent from the IR to the AC.
After writing data into GRAM, the AC is automatically updated plus or minus 1. The AC is not updated
when the data are read from GRAM. Window address function enables data write only in the rectangular
area of GRAM specified by window addresses.
4. Hardware-dither circuit
The hardware-dither circuit converts 18-bit one-pixel data to 16-bit data with hardware-dither conversion.
5. Graphics RAM (GRAM)
GRAM is graphics RAM that stores bit-pattern data of 132 x 176 bytes with 16 bits per pixel.
6. Gray scale power supply voltage generating circuit
The grayscale voltage generation circuit generates liquid crystal drive voltage according to the grayscale
level set with the γ-adjustment register, enabling 262,144-color display with 18 bits per pixel. For details,
see the “γ-adjustment Register” section.
7. LCD drive power supply
The LCD drive power supply generates LCD drive voltage levels, VOP, VON, V31P, V31N, VGH, VGL,
VgoffOUT, and Vcom.
8. Oscillation Circuit (OSC)
The HD66773R can provide R-C oscillation simply by placing an external oscillation-resistor between
OSC1 and OSC2 pins. An appropriate oscillation frequency for operating voltage, display size, and frame
frequency can be obtained by adjusting the external-resistor value. Clock pulses can be supplied externally.
Since R-C oscillation is halted during standby mode, current consumption will be reduced. For details, see
“Oscillation Circuit”.
9. LCD Driver Circuit
The LCD driver circuit of HD66773R consists of a 396-output source driver (S1 ~ S396) and a 176-output
gate driver (G1 ~ G176). Display pattern data are latched when 396-bit data arrive. The latched data
controls source driver and generates drive waveforms. The gate driver, which operates display scan, selects
either VGH or Vgoff level to output. The shift direction of outputting 396-bit data from source driver
outputs is changeable with the SS bit. The shift direction of gate driver scan is changeable with the GS bit.
The scan mode of gate driver is changeable with SM bit. Select an appropriate shift direction and scan
mode for an assembly.
Rev.1.10, Jun.21.2003, page 16 of 133