HD66773R Datasheet, PDF (118/133 Pages) Renesas Technology Corp – 262,144-color, 132 x 176-dot Graphics Controller Driver for TFT LCD panels

HD66773R
80-system Bus Interface Timing Characteristics
Normal Write Mode (HWM=0) (Vcc = 2.2 to 2.4 V)
Item
Symbol Unit
Bus cycle time
Write low-level pulse width
Read low-level pulse width
Write high-level pulse width
Read high-level pulse width
Write/Read rise/fall time
Setup time
(RS to CS*, WR*, RD*)
Address hold time
Write data set up time
Write data hold time
Read data delay time
Read data hold time
Write t_CYCW
ns
Read t_CYCR
ns
PW_LW ns
PW_LR ns
PW_HW ns
PW_HR ns
t_{WRr, WRf}
ns
t_AS
ns
t_AH
ns
t_DSW
ns
t_HWR
ns
t_DDR
ns
t_DHR
ns
Timing
diagram
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Min Typ Max
600 — —
800 — —
90 — —
350 — —
300 — —
400 — —
— — 25
10 — —
5 ——
60 — —
15 — —
— — 200
5 ——
High-Speed Write Mode (HWM=1) (Vcc = 2.2 to 2.4 V)
Item
Bus cycle time
Write low-level pulse width
Read low-level pulse width
Write high-level pulse width
Read high-level pulse width
Write/Read rise/fall time
Set up time
(RS to CS*, WR*, RD*)
Address hold time
Write data set up time
Write data hold time
Read data delay time
Read data hold time
Symbol Unit
Write t_CYCW
ns
Read t_CYCR
ns
PW_LW ns
PW_LR ns
PW_HW ns
PW_HR ns
t_{WRr, WRf}
ns
t_AS
ns
t_AH
ns
t_DSW
ns
t_HWR
ns
t_DDR
ns
t_DHR
ns
Timing
diagram
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Min Typ Max
200 — —
800 — —
90 — —
350 — —
90 — —
400 — —
— — 25
10 — —
5 ——
60 — —
15 — —
— — 200
5—
—
Rev.1.10, Jun.21.2003, page 118 of 133