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RX220_15 Datasheet, PDF (50/107 Pages) Renesas Technology Corp – Renesas MCUs
RX220 Group
5. Electrical Characteristics
Table 5.6 DC Characteristics (5)
Conditions: VCC = AVCC0 = 1.62 to 5.5 V, VSS = AVSS0 = VREFL0 = 0 V, Ta = –40 to +105°C
Item
Symbol Typ.*9
Max.
Unit
Test
Conditions
Supply Medium-speed
current*1 operating modes
1A and 1B
Normal operating No peripheral
mode
operation*2
ICLK = 32 MHz
ICC
4.6
— mA
ICLK = 20 MHz
3.2
—
All peripheral
ICLK = 32 MHz
operation: Normal*3 ICLK = 20 MHz
14
—
9.5
—
All peripheral
operation: Max.*3
ICLK = 32 MHz
ICLK = 20 MHz
—
25
—
19
Sleep mode
No peripheral
operation*2
ICLK = 32 MHz
ICLK = 20 MHz
3.8
—
3.0
—
All peripheral
ICLK = 32 MHz
operation: Normal*3 ICLK = 20 MHz
10
—
7
—
All-module clock stop mode
ICLK = 32 MHz
2.5
—
ICLK = 20 MHz
2.0
—
Increase during Medium-speed operating mode 1A
BGO operation*4
Medium-speed operating mode 1B
17
—
17
—
Low-speed
Normal operating No peripheral
operating mode 1 mode
operation*5
ICLK = 8 MHz
ICLK = 4 MHz
1.4
—
0.9
—
ICLK = 2 MHz
0.7
—
All peripheral
ICLK = 8 MHz
operation: Normal*6 ICLK = 4 MHz
4.2
—
2.6
—
ICLK = 2 MHz
1.8
—
All peripheral
operation: Max.*6
ICLK = 8 MHz
ICLK = 4 MHz
—
6.5
—
3.7
ICLK = 2 MHz
—
2.4
Sleep mode
No peripheral
operation*5
ICLK = 8 MHz
ICLK = 4 MHz
1.5
—
1.2
—
ICLK = 2 MHz
1.1
—
All peripheral
ICLK = 8 MHz
operation: Normal*6 ICLK = 4 MHz
3.1
—
2.1
—
ICLK = 2 MHz
1.5
—
All-module clock stop mode
ICLK = 8 MHz
1.4
—
ICLK = 4 MHz
1.1
—
ICLK = 2 MHz
1.0
—
Low-speed
operating mode 2
Normal operating No peripheral
mode
operation*7
All peripheral
operation: Normal*8
All peripheral
operation: Max.*8
Sleep mode
No peripheral
operation*7
All peripheral
operation: Normal*8
All-module clock stop mode
ICLK = 32 kHz
ICLK = 32 kHz
ICLK = 32 kHz
ICLK = 32 kHz
ICLK = 32 kHz
0.027 —
0.04
—
—
0.23
0.024 —
0.034 —
0.016 —
Note 1. Supply current values do not include output charge/discharge current from all pins. The values apply when internal pull-up MOSs
are in the off state.
Note 2. Clock supply to the peripheral functions is stopped. This does not include BGO operation. The clock source is HOCO. BCLK,
FCLK, and PCLK are set to divided by 64.
Note 3. Clocks are supplied to the peripheral functions. This does not include BGO operation. The clock source is HOCO. BCLK, FCLK,
and PCLK are ICLK divided by 1.
Note 4. This is the increase if data is programmed to or erasing from the ROM or E2 DataFlash during program execution.
R01DS0130EJ0110 Rev.1.10
Dec 20, 2013
Page 50 of 105