PD70F3826_15 Datasheet, PDF (50/75 Pages) Renesas Technology Corp – RENESAS MCU

μ PD70F3826, 70F3827, 70F3828, 70F3829, 70F3830, 70F3831, 70F3832, 70F3833, 70F3834, 70F3835, 70F3836, 70F3837
The following figure shows the configuration of CSIF.
Internal bus
CFnCTL1
CFnCTL0
CFnCTL2
fXX/4
fXX/6
fXX/8
fXX/12
fXX/16
fXX/32
fBRG
SCKFn
SIFn
CFnSTR
Controller
INTCFnT
INTCFnR
fCCLK
Phase control
CFnTX
Shift register
SO latch
Phase
control
SOFn
CFnRX
Remark fXX: Main clock frequency
fBRG: Baud rate generator count clock
fCCLK: Communication clock
16. CSIF
R01DS0029EJ0001 Rev.0.01
Sep 30, 2010
Page 50 of 75