PD70F3826_15 Datasheet, PDF (22/75 Pages) Renesas Technology Corp – RENESAS MCU

μ PD70F3826, 70F3827, 70F3828, 70F3829, 70F3830, 70F3831, 70F3832, 70F3833, 70F3834, 70F3835, 70F3836, 70F3837
1. PIN FUNCTIONS
1.3 Pin I/O Circuits and Recommended Connection of Unused Pins
The I/O circuit type of each pin and recommended connection of unused pins are shown in Table 1-1. For the
schematic circuit diagram of each type, refer to Figure 1-1.
Table 1-1. Types of Pin I/O Circuits (1/3)
Pin
Name
Alternate Function
I/O Circuit
Type
Recommended Connection of Unused Pins
JE3-E JF3-E JG3-E
P02 NMI
P03 INTP00/ADTRG/EXCLK
10-D Input: Independently connect to EVDD or VSS via a 3
3
3
resistor.
Output: Leave open.
−
−
4
P20 TOAB02/INTP01
P21 RTCDIV/RTCCL
P22 RTC1HZ/INTP02
10-D Input: Independently connect to EVDD or VSS via a 4
4
5
resistor.
Output: Leave open.
−
−
6
−
−
7
P23 SIF1/TXDC1/SDA00/INTP03
− 13 16
P24 SOF1/RXDC1/SCL00/INTP04
− 14 17
P25 SCKF1/TIAA30/TOAA30
− 15 18
P26 TIAA31/TOAA31/INTP05
− 16 19
P27 TIAB03/TOAB03/INTP21
4
4
5
P30 TXDC0/SIF2/TIAA00/TOAA00
P31 RXDC0/SOF2/TIAA01/TOAA01
P32 ASCKC0/SCKF2/TIAA10/TOAA10
10-D
Input: Independently connect to EVDD or VSS via a 13 17 20
resistor.
Output: Leave open.
14 18 21
15 19 22
P33 SIF4/TIAA11/TOAA11
−
− 23
P34 SOF4/TIAA20/TOAA20
−
− 24
P35 SCKF4/TIAA21/TOAA21
/TOAA1OFF/INTP06
−
− 80
TIAA21/TOAA21/TOAA1OFF/INTP06
P36 TXDC2/SDA02/CTXD0^Note
P37 RXDC2/SCL02/CRXD0^Note
− 65 −
50 66 81
51 67 82
P40 SIF0/TXDC3/SDA01/RTP00
P41 SOF0/RXDC3/SCL01/RTP01
P42 SCKF0/TIAA40/TOAA40/RTP02
10-D
Input: Independently connect to EVDD or VSS via a 52 68 85
resistor.
Output: Leave open.
53 69 86
54 70 87
P43 RTP03
−
− 88
P44 RTP04
−
− 89
P45 TIAA41/TOAA41/RTP05
−
− 90
P50 INTP07/DDI
P51 INTP08/DDO
P52 INTP09/DCK
10-D
Input: Independently connect to EVDD or VSS via a 16 20 25
resistor.
Output: Leave open.
17 21 26
18 22 27
P53 INTP10/DMS
19 23 28
P54 INTP11/DRST
10-N
Input: Independently connect to VSS via a resistor. 20 24 29
Fixing to VDD level is prohibited.
Output: Leave open.
Internally pull-down after reset by RESET
pin.
P70 ANI0 to ANI9
to
P79
11-G
Input: Independently connect to AVREF0 or AVSS via 64 to
a resistor.
55
Output: Leave open.
80 to 100 to
71 91
Note Available only in on-chip CAN controller products.
Remark JE3-E: V850ES/JE3-E, JF3-E: V850ES/JF3-E, JG3-E: V850ES/JG3-E
R01DS0029EJ0001 Rev.0.01
Sep 30, 2010
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