PD70F3461_15 Datasheet, PDF (49/63 Pages) Renesas Technology Corp – V850E/CAG4-M 32-Bit Single-Chip Microcontroller

µPD70F3461
6.1.3 Code Flash End-of-Line On-Board Programming Characteristics (PG-FP4: CSI)
T_A =-40 to +40°C
V_DD5X = 4.5 to 5.5V
V_DD3x = AV_DD = BV_DD3x = MV_DD3x = 3.0 to 3.6V
V_SS5X = V_SS3x = AV_SS = BV_SS5X = BV_SS3X = MV_SS3X = 0V
Table 6-3: Code Flash End-of-Line On-Board Programming Characteristics (PG-FP4: CSI)
Parameter^a
Symbol
Conditions
MIN.
TYP.
Blank Check Time
Erase Time
Write Time
Read Verify Time
t_CFECBL
t_CFECER ^{W/E cycles ≤ 5}
f_OSC = 16MHz
t_{CFECWR fCSICLK = 2.5MHz}
t_CFECVR
0.08
0.20
13
8
a. All parameters apply to the code flash area, i.e. all code flash blocks (0 to 127).
MAX. Unit
0.10
s
0.40
s
22
s
10
s
Note: The specified value does not include the time needed to establish the connection to the device.
6.1.4 Code Flash End-of-Line Self-Programming Characteristics
T_A =-40 to +40°C
V_DD5X = 4.5 to 5.5V
V_DD3x = AV_DD = BV_DD3x = MV_DD3x = 3.0 to 3.6V
V_SS5X = V_SS3x = AV_SS = BV_SS5X = BV_SS3X = MV_SS3X = 0V
Cautions: 1. The values given in Table 6-4 are only valid for a CPU frequency of 80MHz.
2. The following pre-compile option was used to determine these values:
STATUS_CHECK_USER (in SelfLibSetup.h)
Table 6-4: Code Flash End-of-Line Self-Programming Characteristics
Parameter
Symbol
Conditions
MIN.
TYP.
MAX. Unit
Blank Check Time
Erase Time
Write Time
t_CFLBL,4K One memory block (4K)
t_CFVBL,256K 64 memory blocks (256K)
t_CFLER,4K One memory block (4K)
t_CFLER,256K 64 memory blocks (256K)
t_{CFLWR,2W Write two words}^a
t_CFLWR,4K
One memory block (4K)
@ 256 Bytes^b
0.66
0.79
ms
21.67
26.00
ms
13.97
55.88
ms
34.76 139.04 ms
0.33
0.50
ms
29.48 117.09 ms
Internal Verify Time
t_CFLVR,4K One memory block (4K)
t_CFLVR,256K 64 memory blocks (256K)
2.86
3.43
ms
171.38 205.66 ms
a. The corresponding library call is configured for 2 words per call.
b. The corresponding library call uses a 256 Bytes (= 64 words) source buffer.
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Datasheet U18578EE1V0DS00