PD70F3461_15 Datasheet, PDF (31/63 Pages) Renesas Technology Corp – V850E/CAG4-M 32-Bit Single-Chip Microcontroller

µPD70F3461
Figure 4-6: CSIB Timing In Master Mode (CKP, DAP bits = 00B or 11B)
SCKBn
SOBn
SIBn
t_WSKLM
t_CYSKM
t_WSKHM
t_DSKSOM
t_HSKSOM
t_SSISKM
t_HSKSIM
Figure 4-7: CSIB Timing In Master Mode (CKP, DAP bits = 01B or 10B)
SCKBn
SOBn
SIBn
t_WSKHM
t_CYSKM
t_WSKLM
t_DSKSOM
t_HSKSOM
t_SSISKM
t_HSKSIM
Figure 4-8: CSIB Timing In Slave Mode (CKP, DAP bits = 00B or 11B)
SCKBn
SOBn
SIBn
t_WSKLS
t_CYSKS
t_WSKHS
t_DSKSOS
t_HSKSOS
t_SSISKS
t_HSKSIS
31
Datasheet U18578EE1V0DS00