PD70F3461_15 Datasheet, PDF (35/63 Pages) Renesas Technology Corp – V850E/CAG4-M 32-Bit Single-Chip Microcontroller

µPD70F3461
Table 4-7: CSIE Characteristics (Slave Mode)
Parameter
Macro operation clock, cycle time
SCKEn cycle time
SCKEn high level width
SCKEn low level width
SIEn input setup time (vs. SCKEn)
SIEn input hold time (vs. SCKEn)
SOEn output delay (vs. SCKEn)
SOEn output hold time (vs. SCKEn)
Symbol
t_KCY
t_KCYS
t_KWHS
t_KWLS
t_SSIS
t_HSIS
t_DSOS
t_HSOS
MIN.
31.25
125
t_KCYS/2 - 10
t_KCYS/2 - 10
10
t_KCY x 1.5 +10
t_KCYS/2 - 10
Remark: n= 0,1
MAX.
Unit
ns
ns
ns
ns
ns
ns
20
ns
ns
35
Datasheet U18578EE1V0DS00