38K0 Datasheet, PDF (37/133 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

38K0 Group
b7
b0
0 000000
EP00 control register 3 (EP00CON3) [address 001C16]
Bit symbol
Bit name
CTENDE00 Control transfer completion
enable bit
b7:b1
Not used
Fig. 42 Structure of EP00 control register 3
Function
At reset
H/W S/W ^{R W}
0 : NAK transmission in the status stage
0 – OO
1 : Control transfer completion enabled (SIE transmits
NULL/ACK.) (valid in PID00 = “012”)
At reception of SETUP token:
This bit is cleared to “0” by the hardware.
Write “0” when writing.
– – OO
“0” is read when reading.
–: State remaining
b7
000
b0
EP00 interrupt source register (EP00REQ) [address 001D16]
Bit symbol
BRDY00
CTEND00
CTSTS00
BSRDY00
ERR00
b7:b5
Bit name
Function
At reset _{R W}
H/W S/W
USB function/Endpoint 0 buffer 0: No interrupt request issued
0 0 OO
ready interrupt bit
1: Interrupt request issued
This bit is set to “1” when the buffer is ready state
(enabled to be read/written) on USB function/Endpoint 0.
“0” can be set by software, but “1” cannot be set.
USB function/Endpoint 0 control 0: No interrupt request issued
0 0 OO
transfer completion interrupt bit 1: Interrupt request issued
This bit is set to “1” when control transfer is completed
(NULL/ACK transmission in the status stage) on USB
function/Endpoint 0.
“0” can be set by software, but “1” cannot be set.
USB function/Endpoint 0 status 0: No interrupt request issued
0 0 OO
stage transition interrupt bit
1: Interrupt request issued
This bit is set to “1” when transition to status stage
occurs in CTENDE00 = “0” (control transfer completion
disabled) on USB function/Endpoint 0.
“0” can be set by software, but “1” cannot be set.
<Transition to status stage occurrence factor>
At transfer of control write:
When receiving IN-token in data stage (OUT)
At transfer of control read:
When receiving OUT-token in data stage (IN)
At no data transfer:
Nothing occurs.
USB function/Endpoint 0 SETUP 0: No interrupt request issued
0 0 OO
buffer ready interrupt bit
1: Interrupt request issued
This bit is set to “1” when the exclusive buffer for
SETUP is ready state (enabled to be read) on USB
function/Endpoint 0.
“0” can be set by software, but “1” cannot be set.
USB function/Endpoint 0 error 0: No interrupt request issued
0 0 OO
interrupt bit
1: Interrupt request issued
This bit is set to “1” when control transfer error occurs
on USB function/Endpoint 0.
This bit is cleared to “0” by the hardware when
receiving SETUP token.
“0” can be set by software, but “1” cannot be set.
Not used
Write “0” when writing.
– – OO
“0” is read when reading.
–: State remaining
Fig. 43 Structure of EP00 interrupt source register
Rev.3.00 Oct 05, 2006 page 37 of 129
REJ03B0192-0300