HD151TS207SS Datasheet, PDF (25/38 Pages) Renesas Technology Corp – Mother Board Clock Generator for Intel P4+ Chipset (Springdale)

HD151TS207SS
Renesas clock generator I²C Serial Interface Operation
1. Write mode
1.1 Controller (host) sends a start bit.
1.2 Controller (host) sends the write address D2 (h).
1.3 Renesas clock generator will acknowledge (Renesas clock gen. sends “Low”).
1.4 Controller (host) sends a begin byte M.
1.5 Renesas clock generator will acknowledge (Renesas clock gen. sends “Low”).
1.6 Controller (host) sends a byte count N.
1.7 Renesas clock generator will acknowledge (Renesas clock gen. sends “Low”).
1.8 Controller (host) sends data from byte M to byte M+N–1.
1.9 Renesas clock generator will acknowledge each byte one at a time.
1.10 Controller (host) sends a stop bit.
1 bit
Start bit
7 bits
1 bit 1 bit
8 bits
1 bit
8 bits
1 bit 8 bits
Slave
address
R/W
D2(h)
Ack
Begin Byte = M
Ack Byte Count = N
Ack
Byte M
1 bit 8 bits 1 bit
Ack Byte M+1 Ack
8 bits
1 bit 1 bit
Byte M+N–1 Ack Stop bit
Rev.1.00, Apr.25.2003, page 25 of 38