HD151TS207SS Datasheet, PDF (17/38 Pages) Renesas Technology Corp – Mother Board Clock Generator for Intel P4+ Chipset (Springdale)

HD151TS207SS
I²C Controlled Register Bit Map (cont.)
Byte16 Control Register
Bit Description
Contents
Type Default Note
7
3V66 / PCI / PCIF Divider Control 3V66 divider ratio =
R/W X
Bit3
0010 = 1/2,
0111 = 1/7
6
3V66 / PCI / PCIF Divider Control ^{0011 = 1/3,}
1000 = 1/8
R/W X
Bit2
0100 = 1/4,
1001 = 1/9
0101 = 1/5,
1010 = 1/10
0110 = 1/6,
1011 = 1/11
5
3V66 / PCI / PCIF Divider Control PCI / PCIF divider ratio = 3v66 x R/W X
Bit1
1/2
4
3V66 / PCI / PCIF Divider Control
Bit0
R/W X
3
SRC Divider Control Bit3
2
SRC Divider Control Bit2
1
SRC Divider Control Bit1
0
SRC Divider Control Bit0
0001 = 1/1,
0010 = 1/2,
0011 = 1/3,
0100 = 1/4,
0101 = 1/5,
0110 = 1/6
0111 = 1/7
1000 = 1/8
1001 = 1/9
1010 = 1/10
1011 = 1/11
R/W X
R/W X
R/W X
R/W X
Byte17 Control Register
Bit Description
Contents
Type Default
7
Reserved
R/W 0
6
Reserved
R/W 0
5
Reserved
R/W 0
4
PLL2 Output (VCO2) Frequency 0 = Normal mode
R/W 0
Control Bit
VCO2 frequency is changed on
(M2 / N2 Divider Control Bit)
Table 5 selection decided by
PLL2 : for CPU
FS4/3/2/A/B or B9[5:1].
1 = Over or Down clocking mode
VCO2 frequency is changed by
B17[3:0] and B18[7:0] with
decimal.
B17[3:0] and B18[7:0] are able to
be changed at B17[4] = 1.
3
VCO2 Frequency Control Bit11 These bits are 100MHz digit of R/W 0
2
VCO2 Frequency Control Bit10 ^{VCO2 frequency.}
R/W 1
0000 = 0, 0001 = 1 …. 1001 = 9
1
VCO2 Frequency Control Bit9
R/W 0
0
VCO2 Frequency Control Bit8
R/W 0
Note: 1. B17[3:0] and B18[7:0] must be written together (at writing B18) in every case.
Note
See
Note
1
Rev.1.00, Apr.25.2003, page 17 of 38