HD151TS207SS Datasheet, PDF (11/38 Pages) Renesas Technology Corp – Mother Board Clock Generator for Intel P4+ Chipset (Springdale)

HD151TS207SS
I²C Controlled Register Bit Map (cont.)
Byte7 Vendor Identification Register
Bit Description
7
Revision Code Bit3
6
Revision Code Bit2
5
Revision Code Bit1
4
Revision Code Bit0
3
Vendor ID Bit3
2
Vendor ID Bit2
1
Vendor ID Bit1
0
Vendor ID Bit0
Contents
Vendor Specific
Vendor Specific
Vendor Specific
Vendor Specific
Vendor Specific
Vendor Specific
Vendor Specific
Vendor Specific
Type
R
R
R
R
R
R
R
R
Default
0
0
0
1
1
1
1
1
Note
Byte8 Read Back Byte Count Register
Bit Description
Contents
Type Default Note
7
Read back byte count Bit7 Writing to this register will configure RW 0
6
Read back byte count Bit6 ^{byte Count and how many bytes will} RW 0
be read back.
5
Read back byte count Bit5 _{Default is 1Ehex = 30 bytes.}
RW 0
4
Read back byte count Bit4
RW 1
3
Read back byte count Bit3
RW 1
2
Read back byte count Bit2
RW 1
1
Read back byte count Bit1
RW 1
0
Read back byte count Bit0
RW 0
Rev.1.00, Apr.25.2003, page 11 of 38