HD151TS207SS Datasheet, PDF (10/38 Pages) Renesas Technology Corp – Mother Board Clock Generator for Intel P4+ Chipset (Springdale)

HD151TS207SS
I²C Controlled Register Bit Map (cont.)
Byte4 Control Register
Bit Description
7
USB_48 2x output drive
6
USB_48MHz Output Enable
5
Allow control of PCIF_2 with
assertion of PCI_STOP#
4
Allow control of PCIF_1 with
assertion of PCI_STOP#
3
Allow control of PCIF_0 with
assertion of PCI_STOP#
2
PCIF_2 Output enable
1
PCIF_1 Output enable
0
PCIF_0 Output enable
Contents
0 = 2x Drive strength,
1 = Normal
0 = Disabled,
1 = Enabled
0 = Free Running
1 = Stopped with PCI_STOP#
0 = Free Running
1 = Stopped with PCI_STOP#
0 = Free Running
1 = Stopped with PCI_STOP#
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled
Type
RW
RW
RW
RW
RW
RW
RW
RW
Default Note
0
1
0
0
0
1
1
1
Byte5 Control Register
Bit Description
7
DOT_48MHz Output Enable
6
Reserved
5
VCH Select 66MHz / 48MHz
4
3V66_4/VCH Output Enable
3
3V66_3 Output Enable
2
3V66_2 Output Enable
1
3V66_1 Output Enable
0
3V66_0 Output Enable
Contents
0 = Disabled, 1 = Enabled
0 = 3V66 mode
1 = VCH (48 MHz) mode
0 = Disabled (tristate),
1 = Enabled
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled
Type
RW
RW
RW
Default
1
1
0
Note
RW 1
RW 1
RW 1
RW 1
RW 1
Byte6 Control Register
Bit Description
7
Test Clock Mode
6
Reserved
5
FS_A & FS_B Operation
4
SRC Frequency Select
3
Reserved
2
Spread Spectrum Mode
1
REF1 Output Enable
0
REF0 Output Enable
Contents
0 = Disabled, 1 = Enabled
0 = Normal, 1 = Test mode
0 = 100MHz, 1 = 200 MHz
0 = Spread OFF
1 = Spread ON
0 = Disabled, 1 = Enabled
0 = Disabled, 1 = Enabled
Type
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
0
0
0
1
1
Note
See
B9[7:6]
Rev.1.00, Apr.25.2003, page 10 of 38