CLRC632 Datasheet, PDF (72/163 Pages) NXP Semiconductors – Multiple Protocol Contactless Reader IC

Philips Semiconductors
Multiple Protocol Contactless Reader IC
Product Specification Rev. 3.0; May 2003
CL RC632
5.4 Modes of Register Addressing
Three mechanisms are valid to operate with the CL RC632:
• Initiating functions and controlling data manipulation by executing commands
• Configuring electrical and functional behaviour via a set of configuration bits
• Monitoring the state of the CL RC632 by reading status flags
The commands, configuration bits and flags are accessed via the µ-Processor interface.
The CL RC632 can internally address 64 registers. This basically requires six address lines.
5.4.1 PAGING MECHANISM
The CL RC632 register set is segmented into 8 pages with 8 register each. The Page-Register can always
be addressed, no matter which page is currently selected.
5.4.2 DEDICATED ADDRESS BUS
Using the CL RC632 with dedicated address bus, the µ-Processor defines three address lines via the
address pins A0, A1, and A2. This allows addressing within a page. To switch between registers in different
pages the paging mechanism needs then to be used.
The following table shows how the register address is assembled:
Register Bit:
UsePageSelect
Register-Address
1
PageSelect2 PageSelect1 PageSelect0 A2 A1 A0
Table 5-3: Dedicated Address Bus: Assembling the Register Address
5.4.3 MULTIPLEXED ADDRESS BUS
Using the CL RC632 with multiplexed address bus, the µ-Processor may define all 6 address lines at once.
In this case either the paging mechanism or linear addressing may be used.
The following table shows how the register address is assembled:
Interface Bus Type
Register Bit:
UsePageSelect
Multiplexed Address Bus
(paging mode)
1
Multiplexed Address Bus
(linear addressing)
0
Register-Address
PageSelect2 PageSelect1 PageSelect0
AD5
AD4
AD3
AD2
AD2
Table 5-4: Multiplexed Address Bus: Assembling the Register Address
AD1
AD1
AD0
AD0
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