CLRC632 Datasheet, PDF (104/163 Pages) NXP Semiconductors – Multiple Protocol Contactless Reader IC

Philips Semiconductors
Multiple Protocol Contactless Reader IC
Product Specification Rev. 3.0; May 2003
CL RC632
14.3 Putting the Receiver into Operation
In general, the default settings programmed in the Start Up Initialisation File are suitable to use the CL
RC632 for data communication with MIFARE^ cards. However, in some environments specific user settings
may achieve better performance.
14.3.1 AUTOMATIC CLOCK-Q CALIBRATION
The quadrature demodulation concept of the receiver generates a phase signal I-clock and a 90°-shifted
quadrature signal Q-clock. To achieve an optimum demodulator performance, the Q- and the I-clock have to
have a difference in phase of 90°. After the reset phase of the CL RC632, a calibration procedure is done
automatically. It is possible to have an automatic calibration done at the ending of each Transceive
command. To do so, the ClkQCalib bit has to be configured to a value of 0.
Configuring this bit to a constant value of 1 disables all automatic calibrations except the one after the reset
sequence.
It is also possible to initiate one automatic calibration by software. This is done with a 0 to 1 transition of bit
ClkQCalib.
The details:
calibration impulse
from reset sequence
calibration impulse
from ending of
TRANSEIVE command
the ClkQCalib bit
a rising edge initiates
a clock Q calibration
Note: The duration of the automatic clock Q calibration takes 65 oscillator periods which is approx. 4,8µs.
The value of ClkQDelay is proportional to the phase shift between the Q- and the I-clock. The status flag
ClkQ180Deg shows, that the phase shift between the Q- and the I-clock is greater than 180°.
Notes:
• The start-up configuration file enables an automatically Q-clock calibration after the reset.
• While ClkQCalib is 1, no automatic calibration is done. Therefore leaving this bit 1 can be used to
permanently disable the automatic calibration.
• It is possible to write data to ClkQDelay via the µ-Processor. The aim could be a disabling of the
automatic calibration and to pre-set the delay by software. But notice, that configuring the delay value by
software requires that bit ClkQCalib has already been set to 1 before and that a time interval of at least
4.8µs has elapsed since then. Each delay value must be written with the ClkQCalib bit set to 1. If
ClkQCalib is 0 the configured delay value will be overwritten by the next interval automatic calibration.
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