CLRC632 Datasheet, PDF (13/163 Pages) NXP Semiconductors – Multiple Protocol Contactless Reader IC

Philips Semiconductors
Multiple Protocol Contactless Reader IC
Product Specification Rev. 3.0; May 2003
CL RC632
4 DIGITAL INTERFACE
4.1 Overview of Supported µ-Processor Interfaces
The CL RC632 supports direct interfacing of various µ-Processors. Alternatively the Enhanced Parallel Port
(EPP) of personal computers can be connected directly. The following table shows the parallel interface
signals supported by the CL RC632:
Bus Control Signals
Bus Separated Address and Data Bus Multiplexed Address and Data Bus
control
Separated Read and Write
Strobes
address
data
NRD, NWR, NCS
A0, A1, A2
D0 … D7
NRD, NWR, NCS, ALE
AD0, AD1, AD2, AD3, AD4, AD5
AD0 … AD7
Common Read and Write
Strobe
control
address
data
R/NW, NDS, NCS
A0, A1, A2
D0 … D7
R/NW, NDS, NCS, AS
AD0, AD1, AD2, AD3, AD4, AD5
AD0 … AD7
control
Common Read and Write
Strobe with Handshake _address
-
(EPP)
data
nWrite, nDStrb, nAStrb, nWait
AD0, AD1, AD2, AD3, AD4, AD5
AD0 … AD7
Table 4-1: Supported µ-Processor Interface Signals
4.2 Automatic µ-Processor Interface Type Detection
After every Power-On or Hard Reset, the CL RC632 also resets its parallel µ-Processor interface mode and
checks the current µ-Processor interface type.
The CL RC632 identifies the µ-Processor interface by means of the logic levels on the control pins after the
Reset Phase. This is done by a combination of fixed pin connections (see below) and a dedicated
initialisation routine (see 11.4).
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