XA-C3 Datasheet, PDF (58/68 Pages) NXP Semiconductors – XA 16-bit microcontroller family 32K/1024 OTP CAN transport layer controller 1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID Filters, transport layer co-proce

Philips Semiconductors
XA 16-bit microcontroller family
32K/1024 OTP CAN transport layer controller
1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID filters, transport layer co-processor
Preliminary specification
XA-C3
MERIF
RBFIF
TMCIF
RMCIF
Message Error Interrupt Flag (cleared by writing
‘1’)
Rx Buffer Full Interrupt Flag (cleared by writing
‘1’)
Transmit Message Complete Interrupt Flag
(should be cleared using the 2–step process
described in the section entitled Rx and Tx
Message Complete Interrupts on page 47).
Receive Message Complete Interrupt Flag
(should be cleared using the 2–step process
described in the section entitled Rx and Tx
Message Complete Interrupts on page 47
FESTR (Frame Error Status Register)
D Address: MMR base + 22Ch
D Access: Read, byte or word
D Reset Value: 00h
FESTR
76 5
– – PBO
4
ARBLST
3
2
1
0
BERR BOFF ERRW ERRP
PBO
ARBLST
BERR
BOFF
ERRW
ERRP
Frame Error sub–type is Pre–Buffer Overflow
(cleared by writing ‘1’)
Frame Error sub–type is Arbitration Lost
(cleared by reading the ALCR register)
Frame Error sub–type is Bus Error (cleared by
reading the ECCR register)
Frame Error sub–type is Bus Off (cleared by
writing ‘1’)
Frame Error sub–type is Error Warning (cleared
by writing ‘1’)
Frame Error sub–type is Error Passive (cleared
by writing ‘1’)
FEENR (Frame Error Enable Register)
D Address: MMR base + 22Eh
D Access: Read, byte or word
D Reset Value: 00h
FEENR
76 5
– – PBOE
4
ARBLSTE
3
BERRE
2
1
0
BOFFE ERRWE ERRPE
PBOE
ARBLSTE
BERRE
BOFFE
Pre–Buffer Overflow Enable (0 = disabled, 1 =
enabled)
Arbitration Lost Enable (0 = disabled, 1 =
enabled)
Bus Error Enable (0 = disabled, 1 = enabled)
Bus Off Enable (0 = disabled, 1 = enabled)
ERRWE
ERRPE
Error Warning Enable (0 = disabled, 1 =
enabled)
Error Passive Enable (0 = disabled, 1 =
enabled)
MCIR (Message Complete Info Register)
D Address: MMR base + 229h
D Access: Read, byte or word
D Reset Value: 00h
MCIR
76
5
4
– – 1 or More
3
210
Object Number
1orMore
Object Number
0 = No objects whose INT_EN bits are set
currently have a message complete condition. 1
= One or more objects whose INT_EN bits are
set currently have a message complete
condition.
These 5 bits encode the lowest object number
(0 – 31) of all objects whose INT_EN bits are
set AND who currently have a message
complete condition. If there are no such objects
(1orMore = 0), these bits will be 00000b.
MEIR (Message Error Info Register)
D Address: MMR base + 22Ah
D Access: Read, byte or word
D Reset Value: 00h
MEIR
7
6
5
4
TBU FRAG RBF
3
210
Object Number
[TBU FRAG RBF]
Object Number
001 = Most recent is Rx Buffer Full interrupt.
010 = Most recent is Fragmentation Error
interrupt.
100 = Most recent is Tx Buffer Underflow
interrupt.
These 5 bits encode the object number (0 – 31)
of the Message Object experiencing the most
recent Message Error (Tx Buffer Underflow,
Fragmentation Error, or Rx Buffer Full)
condition. If more than one object are
encountering Message Errors, only the most
recent object number will be available.
MCPLH (Message Complete Status Flags High)
D Address: MMR base + 226h
D Access: Read/Clear, byte or word
D Reset Value: 0000h
2000 Jan 25
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