XA-C3 Datasheet, PDF (43/68 Pages) NXP Semiconductors – XA 16-bit microcontroller family 32K/1024 OTP CAN transport layer controller 1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID Filters, transport layer co-proce

Philips Semiconductors
XA 16-bit microcontroller family
32K/1024 OTP CAN transport layer controller
1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID filters, transport layer co-processor
Preliminary specification
XA-C3
specification. Among other things, CAN Transport Layers permit
transmission of Messages which exceed the 8 byte Data limit
inherent to CAN Frames.
Fragmented Message
A lengthy message (in excess of 8 bytes) divided into data packets
and transmitted using a sequence of individual CAN Frames. The
specific ways that sequences of CAN Frames construct these
lengthy messages is defined within the context of a specific CAN
Transport Layer. The XA-C3 automatically re–assembles these
packets into the original, lengthy message in hardware and reports
(via interrupt) when the completed message is available as an
associated Receive Message Object.
Message Buffer
A block of locations in XA Data memory where incoming (received)
messages are stored or where outgoing (transmit) messages are
staged.
MMR
Memory Mapped Register. An on–chip command/control/status
register whose address is mapped into XA Data memory space and
is accessed as Data memory by the XA processor.
Standard
Bus SOF
Idle 1–bit
CAN.ID
11–bits
RTR IDE r0
1–bit 1–bit 1–bit
DLC
4–bit
Data Field
(0, 1, ..., 8 Bytes)
0, 8, ..., 64-bits
CRC
15–bits
CRC ACK ACK
DEL
DEL
1–bit 1–bit 1–bit
EOF
7–bits
IFS
3–bits
Bus Idle
Bus SOF
Idle 1–bit
Base.ID
11– MSBs
SRR IDE
1–bit 1–bit
Extended.ID
18– LSBs
RTR r1 r0
1–bit 1–bit 1–bit
DLC
4–bit
Data Field
(0, 1, ..., 8 Bytes)
0, 8, ..., 64-bits
CRC
15–bits
CRC ACK ACK
DEL
DEL
1–bit 1–bit 1–bit
RTR … R emote T ransmit R equest
SRR … S ubstitute R emote R equest
IDE … ID E xtension
r1, r0 … “ _{reserved” bits}
DLC … D ata L ength C ^{ode (0, 1, …, 8)}
IFS … Inter F rame S pace
Extended
Figure 35. CAN Frame Formats
SU01336
CTL/CAN Functionality of the XA-C3
Message Objects / Message Management
D The XA-C3 allows the User to define up to 32 separate CTL/CAN
Message Objects.
D Any of these 32 objects can be designated as either a Receive or
Transmit objects.
D Any/all of the (up to 32) Receive Objects may be enabled to
hardware assemble multi frame “Fragmented” messages. For
Receive Objects so enabled, CTL/CAN hardware interrupts the
XA-C3 only at the completion of a multi–frame message which is
assembled in a contiguous fashion and stored in the Receive
message buffer associated with that object. At any given time,
XA-C3 may actively assemble (up to) 32 interleaved CTL
messages.
D Receive objects may also be used as circular CAN Frame buffers,
to store up to 28 CAN frames of 8 data bytes each, between CPU
interrupts.
D Receive Objects, not enabled to hardware–assemble messages,
treat CAN2.0A/B Frames as complete (single–frame) messages
and are thus backward compatible with today’s FullCAN Message
Objects that store single CAN frames.
D XA-C3 supports most CTL/CAN protocols, i.e., Device.Net,
CANopen and OSEK.
D Generally, hardware “Message–Management” on XA-C3 reduces
the CTL instruction bandwidth of today’s CTL message
processing from 80% to as low as 10%.
Acceptance Filtering
The XA-C3 provides extensive ID Screening/Filtering for 32
Message Objects. Each object has a full 30 bits of filter Match over
the CTL/CAN ID Fields as–well–as 29 bits of Mask … per object.
That is, any combination of (up to) 30 bits in the ID Fields may be
Masked out (“don’t care”) and/or Matched on an object–by–object
basis.
Message Storage
Each of the 32 Message Objects has its own designated message
buffer space within the Data memory space addressed by the XA
processor. The size of each message buffer is independently User
specified up to a max of 256 bytes/object. CTL messages that
exceed the 256 byte/object limit can be accommodated with simple
software intervention.
The XA-C3 includes a 512 byte, on–board Message Buffer RAM
where some (or all) of the 32 (Rx/Tx) message buffers may reside.
Message Buffer RAM can be mapped anywhere in the 16 MByte
Data memory space addressed by the XA and can be extended
off–chip to a maximum of 8 KBytes. This off–chip expansion ability
can accommodate up to thirty–two, 256–byte message buffers.
Transmit Pre–Arbitration
Two (2) options are available to pre–arbitrate among pending
(currently enabled) transmit objects. A default option selects and
transmits the object of highest–priority CAN arbitration ID (the same
criteria that arbitrates access to CAN bus itself). Transmit object
number serves as a secondary tie–breaker for queued transmit
2000 Jan 25
36