XA-C3 Datasheet, PDF (33/68 Pages) NXP Semiconductors – XA 16-bit microcontroller family 32K/1024 OTP CAN transport layer controller 1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID Filters, transport layer co-proce

Philips Semiconductors
XA 16-bit microcontroller family
32K/1024 OTP CAN transport layer controller
1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID filters, transport layer co-processor
Preliminary specification
XA-C3
Table 16. Event Interrupt Vectors
DESCRIPTION
FLAG BIT
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Timer 2 interrupt
(CAN) Rx buffer full
Serial port 0 Rx
Serial port 0 Tx
SPI Interrupt
(CAN) Frame Error
(CAN) Message Error
(CAN) Tx message complete
(CAN) Rx message complete
IE0 ; TCON[1]
TF0 ; TCON[5]
IE1 ; TCON[3]
TF1 ; TCON[7]
TF2 ; T2CON[7]
or
T2EX [P1.7]¹
or
EXF2 ; T2CON[6]
CANINTFLG[2]
RI_0 ; S0CON[0]
TI_0 ; S0CON[1]
SPFG ; SPICS[3]
CANINTFLG[4]
CANINTFLG[3]
CANINTFLG[1]
CANINTFLG[0]
VECTOR AD-
DRESS
0080–0083
0084–0087
0088–008B
008C–008F
0090–0093
0094–0097
00A0–00A3
00A4–00A7
00AC–00AF
00B0–00B3
00B4–00B7
00B8–00BB
00BC–00BF
ENABLE BIT
EX0 ; IEL[0]
ET0 ; IEL[1]
EX1 ; IEL[2]
ET1 ; IEL[3]
INTERRUPT
PRIORITY
PX0 ; IPA0[2:0]
PT0 ; IPA0[6:4]
PX1 ; IPA1[2:0]
PT1 ; IPA1[6:4]
ARBITRATION
RANKING
2
3
4
5
ET2 ; IEL[4]
PT2 ; IPA2[2:0]
6
EBUFF ; IEL[5] PBUFF ; IPA2[6:4]
7
ERI0 ; IEH[0]
PRI0 ; IPA4[2:0]
10
ETI0 ; IEH[1]
PTI0 ; IPA4[6:4]
11
ESPI ; IEH[3]
PSPI ; IPA5[6:4]
13
ECER ; IEH[4]
PCER ; IPA6[2:0]
14
EMER ; IEH[5] PMER ; IPA6[6:4]
15
EMTI ; IEH[6]
PMTI ; IPA7[2:0]
16
EMRI ; IEH[7]
PMRI ; IPA7[6:4]
17
NOTE:
1. When Timer 2 is used as a baud rate generator, pin T2EX [P1.7] acts as an additional External interrupt.
Table 17. Software Interrupt Vectors
DESCRIPTION
Software interrupt 7
Software interrupt 6
Software interrupt 5
Software interrupt 4
Software interrupt 3
Software interrupt 2
Software interrupt 1
REQUEST BIT
SWR7 ; SWR[6]
SWR6 ; SWR[5]
SWR5 ; SWR[4]
SWR4 ; SWR[3]
SWR3 ; SWR[2]
SWR2 ; SWR[1]
SWR1 ; SWR[0]
VECTOR ADDRESS
0118–011B
0114–0117
0110–0113
010C–010F
0108–010B
0104–0107
0100–0103
ENABLE BIT
SWE7 ; SWE[6]
SWE6 ; SWE[5]
SWE5 ; SWE[4]
SWE4 ; SWE[3]
SWE3 ; SWE[2]
SWE2 ; SWE[1]
SWE1 ; SWE[0]
INTERRUPT PRIORITY
fixed at 7 (highest priority)
fixed at 6
fixed at 5
fixed at 4
fixed at 3
fixed at 2
fixed at 1 (lowest priority)
ABSOLUTE MAXIMUM RATINGS
Table 18. Absolute Maximum Ratings
PARAMETER
Operating temperature under bias
Storage temperature range
Voltage on EA/ ; V_PP pin to V_SS
Voltage on any other pin to V_SS
Maximum I_OL per I/O pin
Power dissipation (based on package heat transfer limitations, not device power consumption)
RATING
–55 to +125
–65 to +150
0 to +13.0
–0.5 to V_DD+0.5V
15
1.5
UNIT
°C
°C
V
V
mA
W
2000 Jan 25
26