SAA7385 Datasheet, PDF (17/64 Pages) NXP Semiconductors – Error correction and host interface IC for CD-ROM SEQUOIA

Philips Semiconductors
Error correction and host interface IC for
CD-ROM (SEQUOIA)
Preliminary specification
SAA7385
8 MICROCONTROLLER INTERFACE
8.1 Microcontroller interface status register
Table 1 NUM_COR register: 0xF08E
DATA BYTE
MNEMONIC R/W
7
6
5
4
3
2
1
0
NUM_COR R
NUM_COR7 to NUM_COR0
Register 0xF08E indicates the number of corrections performed during the most recently executed
CORRECT_P_SYNDROMES or CORRECT_Q_SYNDROMES command. Note that NUM_COR is only valid after
completion of the CORRECT_P_SYNDROMES or CORRECT_Q_SYNDROMES command, and becomes invalid upon
execution of any other command.
Table 2 ECC_STATUS register: 0xF086
MNEMONIC R/W
7
6
ECC_STATUS R
−
−
DATA BYTE
5
4
3
2
1
0
−
FLG_EQ0 CRC_EQ0 PS_EQ0 QS_EQ0 ECC_ACT
Register 0xF086 provides status information on the current or last ECC command.
Table 3 ECC_STATUS definitions
MNEMONIC
ECC_ACT
QS_EQ0
PS_EQ0
CRC_EQ0
FLG_EQ0
DESCRIPTION
asserted while a command other than ASSERT_ABORT or RELEASE_ABORT remains active
asserted when all Q syndromes are zero
asserted when all P syndromes are zero
asserted when the CRC remainder calculated by the CRC_CALCULATE command is all zeros
asserted when all flag bytes in ECC RAM are zero
8.2 Microcontroller interface command register
Table 4 ECCCTL register: 0xF085
MNEMONIC R/W
7
6
5
ECCCTL R/W
−
−
−
DATA BYTE
4
3
2
1
0
−
ECC_COMMAND3 to ECC_COMMAND0
The ECC_COMMAND definitions are explained in Table 5.
1996 Jun 19
17