ASX340AT_16 Datasheet, PDF (9/54 Pages) ON Semiconductor – 1/4‐inch Color CMOS NTSC/PAL Digital Image SOC

ASX340AT
TABLE 5. RESET/DEFAULT STATE OF INTERFACES (CONTINUED)
Name
Reset State
Default State
Notes
DOUT_LSB1
DOUT_LSB0
DAC_POS
DAC_NEG
DAC_REF
High impedance
High impedance
High impedance
High impedance
High impedance
Driven
Input/Output. This interface disabled by default.
Input buffers (used for GPIO function) powered
down by default, so these pins can be left
unconnected (floating). After reset, these pins
are powered-up, sampled, then powered down
again as part of the auto-configuration
mechanism.
Output. Interface disabled by hardware reset
and enabled by default when the device starts
streaming.
TDI
Internal pull-up enabled
Internal pull-up enabled Input. Internal pull-up means that this pin can be
left unconnected (floating).
TDO
High impedance
High impedance
Output. Driven only during appropriate parts of
the JTAG shifter sequence.
TMS
Internal pull-up enabled
Internal pull-up enabled
Input. Internal pull-up means that this pin can be
left unconnected (floating).
TCK
Internal pull-up enabled
Internal pull-up enabled
Input. Internal pull-up means that this pin can be
left unconnected (floating).
TRST_N
N/A
N/A
Input. Must always be driven to a valid logic
level. Must be driven to GND for normal
operation.
FRAME_SYNC
N/A
N/A
Input. Must always be driven to a valid logic
level. Must be driven to GND if not used.
GPIO12
High impedance
High impedance
Input/Output. This interface disabled by default.
Input buffers (used for GPIO function) powered
down by default, so these pins can be left
unconnected (floating)
GPIO13
High impedance
High impedance
Input/Output. This interface disabled by default.
Input buffers (used for GPIO function) powered
down by default, so these pins can be left
unconnected (floating).
ATEST1
N/A
N/A
Must be driven to GND for normal operation.
ATEST2
N/A
N/A
Must be driven to GND for normal operation.
1. The reason for defining the default state as logic 0 rather than high impedance is this: when wired in a system (for example, on ON
Semiconductor’s demo boards), these outputs will be connected, and the inputs to which they are connected will want to see a valid logic
level. No current drain should result from driving these to a valid logic level (unless there is a pull-up at the system level).
2. These pads have their input circuitry powered down, but they are not output-enabled. Therefore, they can be left floating but they will not
drive a valid logic level to an attached device.
www.onsemi.com
9