ASX340AT_16 Datasheet, PDF (21/54 Pages) ON Semiconductor – 1/4‐inch Color CMOS NTSC/PAL Digital Image SOC

TABLE 14. SPI COMMANDS SUPPORTED
Command
Read Array
Block Erase
Chip Erase
Read Status
Write status
Byte Page Program
Write Enable
Write Disable
Read Manufacturer and Device ID
(Fast) Read Array
ASX340AT
Value
0x03
0 x D8
0 x C7
0 x 05
0 x 01
0 x 02
0 x 06
0 x 04
0 x 9F
0 x 0B
TABLE 15. GPIO BIT DESCRIPTIONS
Low (“0”)
High (“1”)
GPIO[11] (DOUT_LSB1) GPIO[10] (DOUT_LSB0)
Normal
NTSC
Vertical Flip
PAL
GPIO[9]
(FRAME_VALID
Normal
Horizontal mirror
GPI[8] (LINE_VALI
No pedestal
Pedestal
Host Command Interface
ON Semiconductor sensors and SOCs contain numerous
registers that are accessed through a two-wire interface with
speeds up to 400 kHz.
The ASX340AT in addition to writing or reading straight
to/from registers or firmware variables, has a mechanism to
write higher level commands, the Host Command Interface
(HCI). Once a command has been written through the HCI,
it will be executed by on-chip firmware and the results are
reported back. In general, registers should not be accessed
with the exception of registers that are marked for “User
Access.”
EEPROM or Flash memory is also available to store
commands for later execution. Under DMA control, a
command is written into the SOC and executed.
For a complete description of host commands, refer to the
ASX340AT Host Command Interface Specification.
www.onsemi.com
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