ASX340AT_16 Datasheet, PDF (44/54 Pages) ON Semiconductor – 1/4‐inch Color CMOS NTSC/PAL Digital Image SOC

ASX340AT
TABLE 37. RESET_BAR DELAY PARAMETERS (CONTINUED)
Parameter
Name
Conditions
RESET_BAR HIGH to first NTSC frame
tRSTH_NTSC
RESET_BAR HIGH to first PAL frame
tRSTH_PAL
Min Typical Max
Unit
47
–
–
ms
53
–
–
ms
ELECTRICAL SPECIFICATIONS
SPI_CS_N
SPI_SCLK
t _{CS_SCLK}
SPI_SDI
SPI_SDO
t _su ^t SCLK_SDO
Figure 50. SPI Output Timing
TABLE 38. SPI DATA SETUP AND HOLD TIMING
Parameter
f_{SPI_SCLK}
Name
SPI_SCLK Frequency
t_{SPI_SCLK}
t_su
SPI_SCLK Period
Setup time
Conditions
1.6875
55.556
t_{SCLK_SDO}
t_{CS_SCLK}
Hold time
Delay from falling edge of SPI_CS_N to
rising edge of SPI_SCLK
CAUTION: Stresses greater than those listed in Table 37 may
cause permanent damage to the device. This is a stress
rating only, and functional operation of the device at
these or any other conditions above those indicated in
the operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Min
Typical
Max
4.5
18
MHz
592.593
ns
0.5 * t_{SPI_SCLK}
ns
0.5 * t_{SPI_SCLK} + 20
ns
230
ns
TABLE 39. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Parameter
Min
Max
Unit
VDD
Digital power (1.8 V)
−0.3
2.4
V
VDD_IO
I/O power (2.8 V)
−0.3
4
V
VAA
VAA analog power (2.8 V)
−0.3
4
V
VAA_PIX
Pixel array power (2.8 v)
−0.3
4
V
VDD_PLL
PLL power (2.8 V)
−0.3
4
V
VDD_DAC
DAC power (2.8 V)
−0.3
4
V
VIN
DC Input Voltage
−0.3
VDD_IO+0.3
V
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