ASX340AT_16 Datasheet, PDF (29/54 Pages) ON Semiconductor – 1/4‐inch Color CMOS NTSC/PAL Digital Image SOC

ASX340AT
Sequential WRITE, Start at Random Location
This sequence (Figure 22) starts in the same way as the
single WRITE to random location (Figure 21). Instead of
generating a no-acknowledge bit after the first byte of data
has been transferred, the master generates an acknowledge
bit and continues to perform byte writes until “L” bytes have
been written. The WRITE is terminated by the master
generating a stop condition.
Previous Reg Address, N
Reg Address, M
M+1
S
Slave Address 0
A
Reg Address[15:8]
A
Reg Address[7:0]
A
Write Data
A
M+1
M+2
M+3
M+L−2
M+L−1
M+L
Write Data
Write Data
Write Data
Write Data
(15:8)
A
(7:0) ^A
(15:8) ^A
(7:0)
A AA
Write Data
Write Data
Write Data
Write Data A
(15:8W) ^{rite DAata} (7:0) ^{WArAite Data(15:8) A}
(7:0) _A P
Figure 27. Single WRITE to Random Location
Write Data
OVERLAY CAPABILITY
Figure 23 highlights the graphical overlay data flow of
theASX340AT. The images are separated to fit into 2 KB
blocks of memory after compression.
• Up to four overlays may be blended simultaneously
• Overlay size 360 x 480 pixels rendered into a display
area of 720 x 480 pixels (NTSC) or 720 x 576 (PAL)
• Selectable readout: rotating order is user programmable
• Dynamic movement through predefined overlay images
• Palette of 32 colors out of 64,000 with eight colors per
bitmap
• Blend factors may be changed dynamically to achieve
smooth transitions
The host commands allow a bitmap to be written
piecemeal to a memory buffer through the two-wire serial
interface, and also through DMA direct from SPI Flash
memory. Multiple encoding passes may be required to fit an
image into a 2 KB block of memory; alternatively, the image
can be divided into two or more blocks to make the image
fit. Every graphic image may be positioned in the horizontal
and vertical direction and overlap with other graphic
images.
The host may load an image at any time. Under control of
DMA assist, data are transferred to the off-screen buffer in
compressed form. This assures that no display data are
corrupted during the replenishment of the four active
overlay buffers.
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