AMIS-49587 Datasheet, PDF (14/59 Pages) ON Semiconductor – Power Line Carrier Modem

AMIS−49587
Table 22. SPACE AND MARK FREQUENCY
SELECTION (See Appendix C)
ARM
Register
Reset
Description
R_FS[15:0]
R_FM[15:0]
0000h
0000h
Step register for the space
frequency f_S
Step register for the mark
frequency f_M
The space and mark frequency can be calculated as:
• f_S = R_FS[15:0]_dec x f_DDS/2¹⁸
• f_M = R_FM[15:0]_dec x f_DDS/2¹⁸
Or the content of both R_FS[15:0] and R_FM[15:0] are
defined as:
• R_FS[15:0]_dec = Round(2¹⁸ x f_S/f_DDS)
• R_FM[15:0]_dec = Round(2¹⁸ x f_M/f_DDS)
♦ Where f_DDS = 3 MHz is the direct digital
synthesizer clock frequency.
After a hard or soft reset or at the start of the transmission
(when TX_RXB goes from 0 to 1) the phase accumulator
must start at it’s 0 phase position, corresponding with a 0 V
output level. When switching between f_M and f_S the phase
accumulator must give a continuous phase and not restart
from phase 0.
When AMIS−49587 goes into receive mode (when
TX_RXB goes from 1 to 0) the sine wave generator must
make sure to complete the active sine period.
The control logic for the transmitter generates a signal
TX_ENB to enable the external power amplifier. TX_ENB
is 1 when the AMIS−49587 is in receive mode. TX_ENB is
0 when AMIS−49587 is in transmit mode. When going from
transmit to receive mode (TX_RXB goes from 1 to 0) the
TX_ENB signal is kept active for a short period of t_{dTX_ENB}.
The control logic for the transmitter generates a signal
TX_DATA which corresponds to the transmitted SFSK
signal. When transmitting f_M TX_DATA is logic 1. When
transmitting f_S TX_DATA is logic 0. When the transmitter
is not enabled (TX_RXB = 0) TX_DATA goes to logic 1 at
the next BIT_CLK.
BIT_CLK
TX_DATA
TX_RXB
TX_ENB
TX_OUT
Figure 7. TX_ENB Timing
t_{dTX_ENB}
DA Converter
A digital to analog SD converter converts the sine wave
digital word to a pulse density modulated (PDM) signal. The
PDM signal is converted to an analog signal with a first order
switched capacitor filter.
Low Pass Filter
A 3^rd order continuous time low pass filter in the transmit
path filters the quantization noise and noise generated by the
SD DA converter. The low pass filter has a circuit which
tunes the RC time constants of the filter towards the process
characteristics. The C values for the LPF filter are controlled
by the ARM micro controller.
Amplifier with Automatic Level Control (ALC)
The pin ALC_IN is used for level control of the
transmitter output level. First a peak detection is done. The
peak value is compared to 2 thresholds levels: VTL_{ALC_IN}
and VTH_{ALC_IN}. The result of the peak detection is used to
control the setting of the level of TX_OUT. The level of
TX_OUT can be attenuated in 8 steps of 3 dB typical.
After hard or soft reset the level is set at minimum level
(maximum attenuation) When going to reception mode
(when TX_RXB goes from 1 to 0) the level is kept in
memory so that the next transmit frame starts with the old
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