V850E1 Datasheet, PDF (97/226 Pages) NEC – 32-Bit Microprocessor Core

CHAPTER 5 INSTRUCTIONS
<Multiply instruction>
MULHI
Multiply halfword by immediate (16-bit)
Multiply Halfword Immediate
Instruction format MULHI imm16, reg1, reg2
Operation
GR [reg2] ← GR [reg1] × imm16
Format
Opcode
Format VI
15
0 31
16
rrrrr110111RRRRR iiiiiiiiiiiiiiii
Flag
CY –
OV –
S
–
Z
–
SAT –
Explanation
Multiplies the lower halfword data of general-purpose register reg1 by the 16-bit immediate
data, and stores the result in general-purpose register reg2. The data of general-purpose
register reg1 is not affected.
Do not specify r0 as the destination register reg2.
Remark
The higher 16 bits of general-purpose register reg1 are ignored in this operation.
User’s Manual U14559EJ3V1UM
97