V850E1 Datasheet, PDF (212/226 Pages) NEC – 32-Bit Microprocessor Core

APPENDIX C INSTRUCTION OPCODE MAP
This chapter shows the opcode map for the instruction code shown below.
(1) 16-bit format instruction
15
11 10
54
Opcode
(see [a])
0
Sub-opcode (see [b])
(2) 32-bit format instruction
15 14 13 12 11 10
Opcode
(see [a])
54
Sub-opcode (see [h])
Sub-opcode (see [d], [h])
0 31
27 26
21 20 19 18 17 16
Sub-opcode
(see [e])
Sub-opcode
(see [c])
Sub-opcode
(see [f], [g], [i])
Remark Operand convention
Symbol
Meaning
R
reg1: General-purpose register (used as source register)
r
reg2: General-purpose register (mainly used as destination register. Some are also used as
source registers.)
w
reg3: General-purpose register (mainly used as remainder of division results or higher 32 bits
of multiply results)
bit#3
imm×
3-bit data for bit number specification
×-bit immediate data
disp×
×-bit displacement data
cccc
4-bit data condition code specification
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User’s Manual U14559EJ3V1UM