V850E1 Datasheet, PDF (112/226 Pages) NEC – 32-Bit Microprocessor Core

CHAPTER 5 INSTRUCTIONS
<Saturated operation instruction>
SATSUB
Saturated subtract
Saturated Subtract
Instruction format SATSUB reg1, reg2
Operation
GR [reg2] ← saturated (GR [reg2] – GR [reg1])
Format
Opcode
Format I
15
0
rrrrr000101RRRRR
Flag
CY 1 if a borrow to MSB occurs; otherwise, 0.
OV 1 if overflow occurs; otherwise, 0.
S
1 if the result of the saturated operation is negative; otherwise, 0.
Z
1 if the result of the saturated operation is 0; otherwise, 0.
SAT 1 if OV = 1; otherwise, not affected.
Explanation
Subtracts the word data of general-purpose register reg1 from the word data of general-
purpose register reg2, and stores the result in general-purpose register reg2. However, if the
result exceeds the maximum positive value 7FFFFFFFH, 7FFFFFFFH is stored in reg2; if the
result exceeds the maximum negative value 80000000H, 80000000H is stored in reg2. The
SAT flag is set to 1. The data of general-purpose register reg1 is not affected.
Do not specify r0 as the destination register reg2.
Remark
The SAT flag is a cumulative flag. Once the result of the operation of the saturated operation
instruction has been saturated, this flag is set to 1 and is not cleared to 0 even if the result of
the subsequent operations is not saturated.
Even if the SAT flag is set to 1, the saturated operation instruction is executed normally.
Caution
To clear the SAT flag to 0, load data to the PSW by using the LDSR instruction.
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User’s Manual U14559EJ3V1UM