V850E1 Datasheet, PDF (31/226 Pages) NEC – 32-Bit Microprocessor Core

CHAPTER 2 REGISTER SET
2.2.11 Breakpoint address setting registers 0 and 1 (BPAV0, BPAV1)
These registers set the breakpoint addresses to be used by the address comparator.
One or other of these registers is enabled by the setting of the DIR.CS bit.
Writing to/reading from these registers is enabled only in the debug mode (DIR.DM bit = 1). If read in the user
mode (DM bit = 0), an undefined value is read.
When these registers are not used, be sure to set each bit to 1.
Bits 31 to 28 are reserved for future function expansion (fixed to 0).
Caution Use of breakpoint address setting registers 0 and 1 (BPAV0, BPAV1) is possible only in the type
A and B products, not in other type products.
Figure 2-13. Breakpoint Address Setting Registers 0 and 1 (BPAV0, BPAV1)
31
28 27
BPAV0 0 0 0 0
31
28 27
BPAV1 0 0 0 0
(Breakpoint address)
(Breakpoint address)
0
Initial value
0xxxxxxxH
(x: Undefined)
0
Initial value
0xxxxxxxH
(x: Undefined)
2.2.12 Breakpoint address mask registers 0 and 1 (BPAM0, BPAM1)
These registers set the bit mask for address comparison (masked by 1).
One or other of these registers is enabled by the setting of the DIR.CS bit.
Writing to/reading from these registers is enabled only in the debug mode (DIR.DM bit = 1). If read in the user
mode (DM bit = 0), an undefined value is read.
When these registers are not used, be sure to set each bit to 1.
Bits 31 to 28 are reserved for future function expansion (fixed to 0).
Caution Use of breakpoint address mask registers 0 and 1 (BPAM0, BPAM1) is possible only in the type A
and B products, not in other product types.
Figure 2-14. Breakpoint Address Mask Registers 0 and 1 (BPAM0, BPAM1)
31
28 27
BPAM0 0 0 0 0
31
28 27
BPAM1 0 0 0 0
(Breakpoint address mask)
(Breakpoint address mask)
0
Initial value
0xxxxxxxH
(x: Undefined)
0
Initial value
0xxxxxxxH
(x: Undefined)
User’s Manual U14559EJ3V1UM
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