|
MC9S08GB60 Datasheet, PDF (82/290 Pages) Motorola, Inc – Microcontrollers | |||
|
◁ |
Chapter 6 Parallel Input/Output
6.3.6 Port F and High-Current Drivers
Port F
Bit 7
MCU Pin: PTF7
6
5
4
3
PTF6 PTF5 PTF4 PTF3
Figure 6-7. Port F Pin Names
2
PTF2
1
PTF1
Bit 0
PTF0
Port F is an 8-bit port general-purpose I/O that is not shared with any peripheral module. Port F has high
current output drivers.
Port F pins are available as general-purpose I/O pins controlled by the port F data (PTFD), data direction
(PTFDD), pullup enable (PTFPE), and slew rate control (PTFSE) registers. Refer to Section 6.4, âParallel
I/O Controlsâ for more information about general-purpose I/O control.
6.3.7 Port G, BKGD/MS, and Oscillator
Port G
Bit 7
MCU Pin: PTG7
6
5
4
3
PTG6 PTG5 PTG4 PTG3
Figure 6-8. Port G Pin Names
2
PTG2/
EXTAL
1
Bit 0
PTG1/ PTG0/
XTAL BKGD/MS
Port G is an 8-bit port which is shared among the background/mode select function, oscillator, and
general-purpose I/O. When the background/mode select function or oscillator is enabled, the pin direction
will be controlled by the module function.
Port G pins are available as general-purpose I/O pins controlled by the port G data (PTGD), data direction
(PTGDD), pullup enable (PTGPE), and slew rate control (PTGSE) registers. Refer to Section 6.4, âParallel
I/O Controlsâ for more information about general-purpose I/O control.
The internal pullup for PTG0 is enabled when the background/mode select function is enabled, regardless
of the state of PTGPE0. During reset, the BKGD/MS pin functions as a mode select pin. After the MCU
is out of reset, the BKGD/MS pin becomes the background communications input/output pin. The PTG0
can be conï¬gured to be a general-purpose output pin. Refer to Chapter 3, âModes of Operationâ,
Chapter 5, âResets, Interrupts, and System Conï¬gurationâ, and Chapter 15, âDevelopment Supportâ for
more information about using this pin.
The ICG module can be conï¬gured to use PTG2âPTG1 ports as crystal oscillator or external clock pins.
Refer to Chapter 13, âInter-Integrated Circuit (IIC) Moduleâ for more information about using these pins
as oscillator pins.
6.4 Parallel I/O Controls
Provided no on-chip peripheral is controlling a port pin, the pins operate as general-purpose I/O pins that
are accessed and controlled by a data register (PTxD), a data direction register (PTxDD), a pullup enable
register (PTxPE), and a slew rate control register (PTxSE) where x is A, B, C, D, E, F, or G.
MC9S08GB/GT Data Sheet, Rev. 2.3
82
Freescale Semiconductor
|
▷ |