MC9S08GB60 Datasheet, PDF (54/290 Pages) Motorola, Inc – Microcontrollers

Chapter 4 Memory
4.6.1 FLASH Clock Divider Register (FCDIV)
Bit 7 of this register is a read-only status flag. Bits 6 through 0 may be read at any time but can be written
only one time. Before any erase or programming operations are possible, write to this register to set the
frequency of the clock for the nonvolatile memory system within acceptable limits.
Bit 7
6
5
4
3
2
1
Bit 0
Read: DIVLD
PRDIV8 DIV5 DIV4 DIV3 DIV2 DIV1 DIV0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-4. FLASH Clock Divider Register (FCDIV)
DIVLD — Divisor Loaded Status Flag
When set, this read-only status flag indicates that the FCDIV register has been written since reset.
Reset clears this bit and the first write to this register causes this bit to become set regardless of the
data written.
1 = FCDIV has been written since reset; erase and program operations enabled for FLASH.
0 = FCDIV has not been written since reset; erase and program operations disabled for FLASH.
PRDIV8 — Prescale (Divide) FLASH Clock by 8
1 = Clock input to the FLASH clock divider is the bus rate clock divided by 8.
0 = Clock input to the FLASH clock divider is the bus rate clock.
DIV5:DIV0 — Divisor for FLASH Clock Divider
The FLASH clock divider divides the bus rate clock (or the bus rate clock divided by 8 if PRDIV8 = 1)
by the value in the 6-bit DIV5:DIV0 field plus one. The resulting frequency of the internal FLASH
clock must fall within the range of 200 kHz to 150 kHz for proper FLASH operations. Program/erase
timing pulses are one cycle of this internal FLASH clock, which corresponds to a range of 5 µs to
6.7 µs. The automated programming logic uses an integer number of these pulses to complete an erase
or program operation.
if PRDIV8 = 0 — f_FCLK = f_Bus ÷ ([DIV5:DIV0] + 1)
Eqn. 4-1
if PRDIV8 = 1 — f_FCLK = f_Bus ÷ (8 × ([DIV5:DIV0] + 1))
Eqn. 4-2
Table 4-6 shows the appropriate values for PRDIV8 and DIV5:DIV0 for selected bus frequencies.
MC9S08GB/GT Data Sheet, Rev. 2.3
54
Freescale Semiconductor