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MC9S08GB60 Datasheet, PDF (33/290 Pages) Motorola, Inc – Microcontrollers | |||
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Chapter 3 Modes of Operation
3.1 Introduction
The operating modes of the MC9S08GB/GT are described in this section. Entry into each mode, exit from
each mode, and functionality while in each of the modes are described.
3.2 Features
⢠Active background mode for code development
⢠Wait mode:
â CPU shuts down to conserve power
â System clocks running
â Full voltage regulation maintained
⢠Stop modes:
â System clocks stopped; voltage regulator in standby
â Stop1 â Full power down of internal circuits for maximum power savings
â Stop2 â Partial power down of internal circuits, RAM contents retained
â Stop3 â All internal circuits powered for fast recovery
3.3 Run Mode
This is the normal operating mode for the MC9S08GB/GT. This mode is selected when the BKGD/MS
pin is high at the rising edge of reset. In this mode, the CPU executes code from internal memory with
execution beginning at the address fetched from memory at $FFFE:$FFFF after reset.
3.4 Active Background Mode
The active background mode functions are managed through the background debug controller (BDC) in
the HCS08 core. The BDC, together with the on-chip debug module (DBG), provide the means for
analyzing MCU operation during software development.
Active background mode is entered in any of ï¬ve ways:
⢠When the BKGD/MS pin is low at the rising edge of reset
⢠When a BACKGROUND command is received through the BKGD pin
⢠When a BGND instruction is executed
⢠When encountering a BDC breakpoint
⢠When encountering a DBG breakpoint
After entering active background mode, the CPU is held in a suspended state waiting for serial background
commands rather than executing instructions from the userâs application program.
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor
33
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