MC68HC05E0 Datasheet, PDF (81/96 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

OSC1⁽¹⁾
RESET
INTX
Internal
Clock
Internal
Address
Bus
t RL
t ILIH
tILCH
NOTES:
1. Represents the internal gating of the OSC1 pin.
2. RESET vector address shown for timing example.
4064 t _cyc
FFFE
FFFE
FFFE
FFFE
FFFF(2)
RESET or Interrupt
Vector Fetch
Figure 9-2 Stop Recovery Timing Diagram
Table 9-5 Expanded Bus Timing
9
Num
Characteristic
1 Cycle Time
2 Clock Transition
3 Read/Write Hold
4 Address Hold
5 Read/ Write Delay
6 Address Delay
7 Data Set-up (MPU Read)
8 Data Hold (MPU Read)
9 Data Delay (MPU Write)
10 Data Hold (MPU Write)
11 Chip Select Hold
12 Chip Select Delay
Symbol
Min
Typ
Max
Unit
t_CYC
250
–
DC
ns
t_R, t _F
–
10
25
ns
t_RWH
-20
–
0
ns
t _AH
10
20
–
ns
t_RWD
–
–
0
ns
t _AD
–
40
75
ns
t_DSR
40
–
–
ns
t_DHR
-20
–
–
ns
t_DDW
–
30
50
ns
t_DHW
10
–
–
ns
tCSH
-20
–
0
ns
t_CSD
–
–
0
ns
MC68HC05E0
ELECTRICAL SPECIFICATIONS
MOTOROLA
9-5