MC68HC05E0 Datasheet, PDF (71/96 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

BD1, BD0 — Baud Rate Select Bits (see Table 8-2).
PS1, PS0 — Port Select Bits
These bits should be 10 or 11 (binary) to select an SPI function (see Table 8-1).
The Serial Peripheral Interface is controlled via the SI S Register ($0011).
Serial interface S register
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0011
BB
ACK
TFF/
DOIT
IRQ/
ACK
NMA
SP
ST R/WB 0000 0000
TFF/DOIT — Transmission Failure Flag/“Do it” Bit
Writing this bit high starts an SPI bus transaction. Reading this bit at the end of an SPI transmit
sequence shows the state of the TFF flag. If high, this indicates a mismatch between data in the
SI Data Register and the data sent on the serial data line. Writing a zero to this bit clears and
resets the Transmission Failure Flag circuitry.
Read
Write
1 (set) – Transmission error
Start Send or Receive
8
0 (clear) – No transmission error
Clear and reset TFF
IRQACK — Interrupt Acknowledge Flag Bit
This bit is the serial interface interrupt flag, raised at the end of every SPI/I2C-bus transaction.
Writing a zero to IRQACK clears the interrupt flag, resets the interrupt circuitry and permits new
data to be written to the data register or newly received data to overwrite the old data in the
reception register (meaning the data register has already been read).
1 (set) – SPI transaction completed
0 (clear) – No SPI transaction has occurred
R/WB — Read/Write Bit
This bit selects the direction of the data transfer during SPI or I2C-bus operation.
1 (set) – Read (from peripheral)
0 (clear) – Write (to peripheral)
MC68HC05E0
SERIAL INTERFACE
MOTOROLA
8-5