MC68HC05E0 Datasheet, PDF (56/96 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit

WAKF
6
IRQB
INTX
Real Time
Interrupt
8
Wake-up
Phase Register
($0014)
8
Wake-up
Enable Register
($0013)
Figure 6-2 Port C Wake-up Function
6.3
Port D Alternate Functions
All Port D lines can be reconfigured to provide the signals needed to interface with external
memory (see Table 6-1).
R/W is the Read/Write signal which is active low only during the high phase of P02 and stays high
during the low phase of P02.
The chip select signals CS2 and CS3 are active low and are only active during the high phase of
P02.
LIR is an output signal which goes low only during the first P02 clock cycle of each instruction, and
remains low for the duration of that cycle. It is intended for use during debugging and emulation.
MOTOROLA
6-4
PARALLEL INPUT/OUTPUT PORTS
MC68HC05E0